Searched refs:HHI_HDMI_PLL_CNTL5 (Results 1 - 3 of 3) sorted by relevance

/u-boot/drivers/video/meson/
H A Dmeson_vclk.c80 #define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in data sheet */ macro
226 hhi_write(HHI_HDMI_PLL_CNTL5, 0x71486980);
239 hhi_write(HHI_HDMI_PLL_CNTL5, 0x001fa729);
256 hhi_write(HHI_HDMI_PLL_CNTL5, 0x65771290);
444 hhi_write(HHI_HDMI_PLL_CNTL5, 0x71486980);
460 hhi_write(HHI_HDMI_PLL_CNTL5, 0x001fa729);
485 hhi_write(HHI_HDMI_PLL_CNTL5, 0x11551293);
488 hhi_write(HHI_HDMI_PLL_CNTL5, 0x65771290);
494 hhi_write(HHI_HDMI_PLL_CNTL5, 0x33771290);
/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-g12a.h100 #define HHI_HDMI_PLL_CNTL5 0x334 macro
H A Dclock-gx.h101 #define HHI_HDMI_PLL_CNTL5 0x330 /* 0xcc offset in data sheet */ macro

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