Searched refs:GPI (Results 1 - 3 of 3) sorted by relevance
| /u-boot/board/intel/cherryhill/ |
| H A D | cherryhill.c | 88 GPIO_PAD_CONF("N15: GPIO_SUS0", GPIO, M1, GPI, NA, NA,
91 GPIO_PAD_CONF("N19: GPIO_SUS1", GPIO, M1, GPI, NA, NA,
94 GPIO_PAD_CONF("N24: GPIO_SUS2", GPIO, M1, GPI, NA, NA,
106 GPIO_PAD_CONF("N25: GPIO_SUS6", GPIO, M1, GPI, NA, NA,
110 GPIO_PAD_CONF("N18: GPIO_SUS7", GPIO, M1, GPI, NA, NA,
134 GPIO_PAD_CONF("N65: PANEL0_BKLTCTL", GPIO, M1, GPI, NA, NA,
137 GPIO_PAD_CONF("N60: PANEL0_BKLTEN", GPIO, M1, GPI, NA, NA,
140 GPIO_PAD_CONF("N72: PANEL0_VDDEN", GPIO, M1, GPI, NA, NA,
155 GPIO_PAD_CONF("N16: SEC_GPIO_SUS10", GPIO, M1, GPI, NA, NA,
158 GPIO_PAD_CONF("N21: SEC_GPIO_SUS11", GPIO, M1, GPI, N
[all...] |
| /u-boot/arch/x86/include/asm/arch-braswell/ |
| H A D | gpio.h | 53 GPI = 2, /* GPI, input only in PAD_VALUE */ enumerator in enum:gpio_en
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| /u-boot/drivers/pinctrl/nuvoton/ |
| H A D | pinctrl-npcm7xx.c | 699 #define GPI 0x1 /* Not GPO */ macro
700 #define GPO 0x2 /* Not GPI */
950 NPCM7XX_PINCFG(253, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC1 power */
951 NPCM7XX_PINCFG(254, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* SDHC2 power */
952 NPCM7XX_PINCFG(255, none, NONE, 0, none, NONE, 0, none, NONE, 0, GPI), /* DACOSEL */
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