Searched refs:FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT (Results 1 - 2 of 2) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu.c75 >> FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT;
/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h1506 #define FSL_CORENET_RCWSR5_DDR_SYNC_SHIFT 7 macro

Completed in 215 milliseconds