Searched refs:FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT (Results 1 - 2 of 2) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dspeed.c94 FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT) &
/u-boot/arch/powerpc/include/asm/
H A Dimmap_85xx.h1497 #define FSL_CORENET2_RCWSR5_DDR_REFCLK_SEL_SHIFT 4 macro

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