Searched refs:DRAM_CLK_ROOT_POST_DIV_MASK (Results 1 - 3 of 3) sorted by relevance

/u-boot/arch/arm/mach-imx/mx7/
H A Dclock_slice.c562 val &= DRAM_CLK_ROOT_POST_DIV_MASK;
H A Dclock.c488 post_div = reg & DRAM_CLK_ROOT_POST_DIV_MASK;
/u-boot/arch/arm/include/asm/arch-mx7/
H A Dcrm_regs.h2095 #define DRAM_CLK_ROOT_POST_DIV_MASK 0x00000007 macro

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