Searched refs:DDRC_FREQ2_INIT4 (Results 1 - 5 of 5) sorted by relevance

/u-boot/board/beacon/imx8mm/
H A Dlpddr4_timing.c116 { DDRC_FREQ2_INIT4(0), 0x00310008 },
117 { DDRC_FREQ2_INIT4(0), (LPDDR4_MR3 << 16) | 0x0000 },
/u-boot/board/purism/librem5/
H A Dlpddr4_timing.c132 { DDRC_FREQ2_INIT4(0), 0x00310008 },
/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing.c132 { DDRC_FREQ2_INIT4(0), 0x00310008 },
/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h573 #define DDRC_FREQ2_INIT4(X) (DDRC_IPS_BASE_ADDR(X) + 0x30e0) macro
/u-boot/board/ronetix/imx8mq-cm/
H A Dlpddr4_timing.c132 { DDRC_FREQ2_INIT4(0), 0x310000 },

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