Searched refs:DDRC_FREQ2_DRAMTMG6 (Results 1 - 5 of 5) sorted by relevance

/u-boot/board/purism/librem5/
H A Dlpddr4_timing.c123 { DDRC_FREQ2_DRAMTMG6(0), 0x0a060004 },
/u-boot/board/freescale/imx8mq_evk/
H A Dlpddr4_timing.c123 { DDRC_FREQ2_DRAMTMG6(0), 0x0a060004 },
/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h582 #define DDRC_FREQ2_DRAMTMG6(X) (DDRC_IPS_BASE_ADDR(X) + 0x3118) macro
/u-boot/board/ronetix/imx8mq-cm/
H A Dlpddr4_timing.c123 { DDRC_FREQ2_DRAMTMG6(0), 0x1010004 },
/u-boot/board/beacon/imx8mm/
H A Dlpddr4_timing.c106 { DDRC_FREQ2_DRAMTMG6(0), 0x0a060004 },

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