Searched refs:DC_CST (Results 1 - 3 of 3) sorted by relevance

/u-boot/arch/powerpc/cpu/mpc8xx/
H A Dcache.c39 mtspr(DC_CST, IDC_INVALL);
40 mtspr(DC_CST, IDC_ENABLE);
46 mtspr(DC_CST, IDC_DISABLE);
47 mtspr(DC_CST, IDC_INVALL);
H A Dstart.S91 mfspr r3, DC_CST
95 mtspr DC_CST, r3
99 mtspr DC_CST, r3
102 mtspr DC_CST, r3
/u-boot/arch/powerpc/include/asm/
H A Dcache.h73 #define DC_CST 568 /* Data cache control/status */ macro
120 return mfspr(DC_CST);
125 mtspr(DC_CST, val);

Completed in 42 milliseconds