Searched refs:CPU_MRVL_ID_OFFSET (Results 1 - 4 of 4) sorted by relevance

/u-boot/drivers/ddr/marvell/a38x/
H A Dmv_ddr_plat.h86 #define CPU_MRVL_ID_OFFSET 0x10 macro
H A Dmv_ddr_plat.c1342 reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET);
1343 reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET);
1346 reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET);
1349 reg_bit_set(CPU_CONFIGURATION_REG(0), CPU_MRVL_ID_OFFSET);
/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_init.c389 reg_bit_set(CPU_CONFIGURATION_REG(3), CPU_MRVL_ID_OFFSET);
390 reg_bit_set(CPU_CONFIGURATION_REG(2), CPU_MRVL_ID_OFFSET);
392 reg_bit_set(CPU_CONFIGURATION_REG(1), CPU_MRVL_ID_OFFSET);
394 reg_bit_set(CPU_CONFIGURATION_REG(0), CPU_MRVL_ID_OFFSET);
H A Dddr3_axp.h33 #define CPU_MRVL_ID_OFFSET 0x10 macro

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