Searched refs:CPLD_LANE_D_SEL (Results 1 - 1 of 1) sorted by relevance
| /u-boot/board/freescale/p2041rdb/ | ||
| H A D | p2041rdb.c | 80 #define CPLD_LANE_D_SEL 0x8 macro 97 mux |= CPLD_LANE_C_SEL | CPLD_LANE_D_SEL; 108 mux |= CPLD_LANE_G_SEL | CPLD_LANE_C_SEL | CPLD_LANE_D_SEL; |
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