Searched refs:CLK_TOP_UART2_SEL (Results 1 - 19 of 19) sorted by relevance
| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 108 #define CLK_TOP_UART2_SEL 84 macro
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| H A D | mt8518-clk.h | 107 #define CLK_TOP_UART2_SEL 85 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 108 #define CLK_TOP_UART2_SEL 84 macro
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| H A D | mt8518-clk.h | 107 #define CLK_TOP_UART2_SEL 85 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 108 #define CLK_TOP_UART2_SEL 84 macro
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| H A D | mt8518-clk.h | 107 #define CLK_TOP_UART2_SEL 85 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 108 #define CLK_TOP_UART2_SEL 84 macro
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| H A D | mt8518-clk.h | 107 #define CLK_TOP_UART2_SEL 85 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 108 #define CLK_TOP_UART2_SEL 84 macro
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| H A D | mt8518-clk.h | 107 #define CLK_TOP_UART2_SEL 85 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 108 #define CLK_TOP_UART2_SEL 84 macro
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| H A D | mt8518-clk.h | 107 #define CLK_TOP_UART2_SEL 85 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 108 #define CLK_TOP_UART2_SEL 84 macro
|
| H A D | mt8518-clk.h | 107 #define CLK_TOP_UART2_SEL 85 macro
|
| /u-boot/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 108 #define CLK_TOP_UART2_SEL 84 macro
|
| H A D | mt8518-clk.h | 107 #define CLK_TOP_UART2_SEL 85 macro
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| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 191 #define CLK_TOP_UART2_SEL 159 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 534 MUX(CLK_TOP_UART2_SEL, uart2_parents, 0x07c, 4, 1),
710 GATE_TOP3(CLK_TOP_RG_UART2, CLK_TOP_UART2_SEL, 15),
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| H A D | clk-mt8518.c | 1206 MUX(CLK_TOP_UART2_SEL, uart0_parents, 0x07c, 4, 1),
1455 GATE_TOP4(CLK_TOP_RG_UART2, CLK_TOP_UART2_SEL, 15),
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