Searched refs:CLK_TOP_PWM_MM_SEL (Results 1 - 19 of 19) sorted by relevance
| /u-boot/dts/upstream/include/dt-bindings/clock/ |
| H A D | mt8167-clk.h | 57 #define CLK_TOP_PWM_MM_SEL (CLK_TOP_NR_CLK + 33) macro
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| /u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 76 #define CLK_TOP_PWM_MM_SEL 52 macro
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| H A D | mt8518-clk.h | 88 #define CLK_TOP_PWM_MM_SEL 66 macro
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| /u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 76 #define CLK_TOP_PWM_MM_SEL 52 macro
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| H A D | mt8518-clk.h | 88 #define CLK_TOP_PWM_MM_SEL 66 macro
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| /u-boot/arch/arm/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 76 #define CLK_TOP_PWM_MM_SEL 52 macro
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| H A D | mt8518-clk.h | 88 #define CLK_TOP_PWM_MM_SEL 66 macro
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| /u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 76 #define CLK_TOP_PWM_MM_SEL 52 macro
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| H A D | mt8518-clk.h | 88 #define CLK_TOP_PWM_MM_SEL 66 macro
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| /u-boot/arch/mips/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 76 #define CLK_TOP_PWM_MM_SEL 52 macro
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| H A D | mt8518-clk.h | 88 #define CLK_TOP_PWM_MM_SEL 66 macro
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| /u-boot/arch/x86/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 76 #define CLK_TOP_PWM_MM_SEL 52 macro
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| H A D | mt8518-clk.h | 88 #define CLK_TOP_PWM_MM_SEL 66 macro
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| /u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 76 #define CLK_TOP_PWM_MM_SEL 52 macro
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| H A D | mt8518-clk.h | 88 #define CLK_TOP_PWM_MM_SEL 66 macro
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| /u-boot/include/dt-bindings/clock/ |
| H A D | mt8516-clk.h | 76 #define CLK_TOP_PWM_MM_SEL 52 macro
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| H A D | mt8518-clk.h | 88 #define CLK_TOP_PWM_MM_SEL 66 macro
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| /u-boot/drivers/clk/mediatek/ |
| H A D | clk-mt8516.c | 498 MUX(CLK_TOP_PWM_MM_SEL, pwm_mm_parents, 0x000, 18, 1),
635 GATE_TOP0(CLK_TOP_PWM_MM, CLK_TOP_PWM_MM_SEL, 0),
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| H A D | clk-mt8518.c | 1183 MUX(CLK_TOP_PWM_MM_SEL, pwm_mm_parents, 0x000, 18, 1),
1382 GATE_TOP0(CLK_TOP_PWM_MM, CLK_TOP_PWM_MM_SEL, 0),
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