Searched refs:CLK_TOP_MUX_MSDC50_0 (Results 1 - 11 of 11) sorted by relevance

/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h137 #define CLK_TOP_MUX_MSDC50_0 101 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h137 #define CLK_TOP_MUX_MSDC50_0 101 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h137 #define CLK_TOP_MUX_MSDC50_0 101 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h137 #define CLK_TOP_MUX_MSDC50_0 101 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h137 #define CLK_TOP_MUX_MSDC50_0 101 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h137 #define CLK_TOP_MUX_MSDC50_0 101 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8183-clk.h137 #define CLK_TOP_MUX_MSDC50_0 101 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h137 #define CLK_TOP_MUX_MSDC50_0 101 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt6797-clk.h27 #define CLK_TOP_MUX_MSDC50_0 17 macro
H A Dmt8183-clk.h44 #define CLK_TOP_MUX_MSDC50_0 8 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8183.c560 MUX(CLK_TOP_MUX_MSDC50_0, msdc50_0_parents, 0x80, 8, 3),
694 GATE_INFRA1(CLK_INFRA_MSDC0_SCK, CLK_TOP_MUX_MSDC50_0, 6),
746 GATE_INFRA3(CLK_INFRA_MSDC0_SELF, CLK_TOP_MUX_MSDC50_0, 0),
747 GATE_INFRA3(CLK_INFRA_MSDC1_SELF, CLK_TOP_MUX_MSDC50_0, 1),
748 GATE_INFRA3(CLK_INFRA_MSDC2_SELF, CLK_TOP_MUX_MSDC50_0, 2),
761 GATE_INFRA3(CLK_INFRA_FBIST2FPC, CLK_TOP_MUX_MSDC50_0, 24),

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