Searched refs:CLK_TOP_MUX_DSP1 (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h125 #define CLK_TOP_MUX_DSP1 89 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h125 #define CLK_TOP_MUX_DSP1 89 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h125 #define CLK_TOP_MUX_DSP1 89 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h125 #define CLK_TOP_MUX_DSP1 89 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h125 #define CLK_TOP_MUX_DSP1 89 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h125 #define CLK_TOP_MUX_DSP1 89 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8183-clk.h125 #define CLK_TOP_MUX_DSP1 89 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h125 #define CLK_TOP_MUX_DSP1 89 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt8183-clk.h72 #define CLK_TOP_MUX_DSP1 36 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8183.c545 MUX(CLK_TOP_MUX_DSP1, dsp1_parents, 0x50, 8, 4),

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