Searched refs:CLK_TOP_MSDC2_CLK50_SEL (Results 1 - 9 of 9) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h138 #define CLK_TOP_MSDC2_CLK50_SEL 116 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8518.c1244 MUX(CLK_TOP_MSDC2_CLK50_SEL, msdc0_clk50_parents, 0xF4, 23, 6),

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