Searched refs:CLK_TOP_MMPLL_D7 (Results 1 - 15 of 15) sorted by relevance

/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt8135-clk.h28 #define CLK_TOP_MMPLL_D7 17 macro
H A Dmt6779-clk.h122 #define CLK_TOP_MMPLL_D7 112 macro
H A Dmt8183-clk.h147 #define CLK_TOP_MMPLL_D7 111 macro
H A Dmt8192-clk.h127 #define CLK_TOP_MMPLL_D7 115 macro
H A Dmediatek,mt8188-clk.h156 #define CLK_TOP_MMPLL_D7 145 macro
H A Dmt8195-clk.h193 #define CLK_TOP_MMPLL_D7 181 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8183.c172 FACTOR(CLK_TOP_MMPLL_D7, CLK_APMIXED_MMPLL, 1, 7, CLK_PARENT_APMIXED),
203 CLK_TOP_MMPLL_D7,
226 CLK_TOP_MMPLL_D7,
237 CLK_TOP_MMPLL_D7,
249 CLK_TOP_MMPLL_D7,
261 CLK_TOP_MMPLL_D7,
273 CLK_TOP_MMPLL_D7,
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h98 #define CLK_TOP_MMPLL_D7 62 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h98 #define CLK_TOP_MMPLL_D7 62 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h98 #define CLK_TOP_MMPLL_D7 62 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h98 #define CLK_TOP_MMPLL_D7 62 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h98 #define CLK_TOP_MMPLL_D7 62 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h98 #define CLK_TOP_MMPLL_D7 62 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8183-clk.h98 #define CLK_TOP_MMPLL_D7 62 macro
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8183-clk.h98 #define CLK_TOP_MMPLL_D7 62 macro

Completed in 273 milliseconds