Searched refs:CLK_TOP_HAPLL2_SEL (Results 1 - 18 of 18) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h82 #define CLK_TOP_HAPLL2_SEL 71 macro
H A Dmt8518-clk.h133 #define CLK_TOP_HAPLL2_SEL 111 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8512-clk.h82 #define CLK_TOP_HAPLL2_SEL 71 macro
H A Dmt8518-clk.h133 #define CLK_TOP_HAPLL2_SEL 111 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h82 #define CLK_TOP_HAPLL2_SEL 71 macro
H A Dmt8518-clk.h133 #define CLK_TOP_HAPLL2_SEL 111 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h82 #define CLK_TOP_HAPLL2_SEL 71 macro
H A Dmt8518-clk.h133 #define CLK_TOP_HAPLL2_SEL 111 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h82 #define CLK_TOP_HAPLL2_SEL 71 macro
H A Dmt8518-clk.h133 #define CLK_TOP_HAPLL2_SEL 111 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h82 #define CLK_TOP_HAPLL2_SEL 71 macro
H A Dmt8518-clk.h133 #define CLK_TOP_HAPLL2_SEL 111 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h82 #define CLK_TOP_HAPLL2_SEL 71 macro
H A Dmt8518-clk.h133 #define CLK_TOP_HAPLL2_SEL 111 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8512-clk.h82 #define CLK_TOP_HAPLL2_SEL 71 macro
H A Dmt8518-clk.h133 #define CLK_TOP_HAPLL2_SEL 111 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8518.c1238 MUX(CLK_TOP_HAPLL2_SEL, hapll2_parents, 0xDC, 4, 4),
1465 GATE_TOP5_I(CLK_TOP_HAPLL2, CLK_TOP_HAPLL2_SEL, 7),
H A Dclk-mt8512.c492 MUX_CLR_SET_UPD_FLAGS(CLK_TOP_HAPLL2_SEL, hapll2_parents,

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