Searched refs:CLK_TOP_APLL2_SRC_SEL (Results 1 - 9 of 9) sorted by relevance

/u-boot/drivers/clk/mediatek/
H A Dclk-mt8518.c122 FACTOR1(CLK_TOP_RG_APLL2_D2, CLK_TOP_APLL2_SRC_SEL, 1, 2),
123 FACTOR1(CLK_TOP_RG_APLL2_D4, CLK_TOP_APLL2_SRC_SEL, 1, 4),
124 FACTOR1(CLK_TOP_RG_APLL2_D8, CLK_TOP_APLL2_SRC_SEL, 1, 8),
125 FACTOR1(CLK_TOP_RG_APLL2_D16, CLK_TOP_APLL2_SRC_SEL, 1, 16),
126 FACTOR1(CLK_TOP_RG_APLL2_D3, CLK_TOP_APLL2_SRC_SEL, 1, 3),
293 CLK_TOP_APLL2_SRC_SEL
395 CLK_TOP_APLL2_SRC_SEL,
819 CLK_TOP_APLL2_SRC_SEL,
1232 MUX(CLK_TOP_APLL2_SRC_SEL, apll2_src_parents, 0xCC, 15, 2),
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h129 #define CLK_TOP_APLL2_SRC_SEL 107 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8518-clk.h129 #define CLK_TOP_APLL2_SRC_SEL 107 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h129 #define CLK_TOP_APLL2_SRC_SEL 107 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h129 #define CLK_TOP_APLL2_SRC_SEL 107 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h129 #define CLK_TOP_APLL2_SRC_SEL 107 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h129 #define CLK_TOP_APLL2_SRC_SEL 107 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h129 #define CLK_TOP_APLL2_SRC_SEL 107 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h129 #define CLK_TOP_APLL2_SRC_SEL 107 macro

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