Searched refs:CLK_TOP_APLL2_REF_SEL (Results 1 - 10 of 10) sorted by relevance

/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h126 #define CLK_TOP_APLL2_REF_SEL 104 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8518-clk.h126 #define CLK_TOP_APLL2_REF_SEL 104 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h126 #define CLK_TOP_APLL2_REF_SEL 104 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h126 #define CLK_TOP_APLL2_REF_SEL 104 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h126 #define CLK_TOP_APLL2_REF_SEL 104 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h126 #define CLK_TOP_APLL2_REF_SEL 104 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h126 #define CLK_TOP_APLL2_REF_SEL 104 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h126 #define CLK_TOP_APLL2_REF_SEL 104 macro
/u-boot/dts/upstream/include/dt-bindings/clock/
H A Dmt2712-clk.h219 #define CLK_TOP_APLL2_REF_SEL 188 macro
/u-boot/drivers/clk/mediatek/
H A Dclk-mt8518.c1229 MUX(CLK_TOP_APLL2_REF_SEL, apll1_ref_parents, 0xCC, 9, 3),

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