Searched refs:CLK_TOP_APLL1_SRC_SEL (Results 1 - 9 of 9) sorted by relevance

/u-boot/drivers/clk/mediatek/
H A Dclk-mt8518.c117 FACTOR1(CLK_TOP_RG_APLL1_D2, CLK_TOP_APLL1_SRC_SEL, 1, 2),
118 FACTOR1(CLK_TOP_RG_APLL1_D4, CLK_TOP_APLL1_SRC_SEL, 1, 4),
119 FACTOR1(CLK_TOP_RG_APLL1_D8, CLK_TOP_APLL1_SRC_SEL, 1, 8),
120 FACTOR1(CLK_TOP_RG_APLL1_D16, CLK_TOP_APLL1_SRC_SEL, 1, 16),
121 FACTOR1(CLK_TOP_RG_APLL1_D3, CLK_TOP_APLL1_SRC_SEL, 1, 3),
288 CLK_TOP_APLL1_SRC_SEL
384 CLK_TOP_APLL1_SRC_SEL,
807 CLK_TOP_APLL1_SRC_SEL,
1231 MUX(CLK_TOP_APLL1_SRC_SEL, apll1_src_parents, 0xCC, 13, 2),
/u-boot/arch/arm/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h128 #define CLK_TOP_APLL1_SRC_SEL 106 macro
/u-boot/include/dt-bindings/clock/
H A Dmt8518-clk.h128 #define CLK_TOP_APLL1_SRC_SEL 106 macro
/u-boot/arch/microblaze/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h128 #define CLK_TOP_APLL1_SRC_SEL 106 macro
/u-boot/arch/mips/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h128 #define CLK_TOP_APLL1_SRC_SEL 106 macro
/u-boot/arch/nios2/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h128 #define CLK_TOP_APLL1_SRC_SEL 106 macro
/u-boot/arch/sandbox/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h128 #define CLK_TOP_APLL1_SRC_SEL 106 macro
/u-boot/arch/x86/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h128 #define CLK_TOP_APLL1_SRC_SEL 106 macro
/u-boot/arch/xtensa/dts/include/dt-bindings/clock/
H A Dmt8518-clk.h128 #define CLK_TOP_APLL1_SRC_SEL 106 macro

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