Searched refs:CLK_TOP_AHB_INFRA_D2 (Results 1 - 19 of 19) sorted by relevance
/u-boot/arch/nios2/dts/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 67 #define CLK_TOP_AHB_INFRA_D2 43 macro
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H A D | mt8518-clk.h | 83 #define CLK_TOP_AHB_INFRA_D2 61 macro
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/u-boot/arch/sandbox/dts/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 67 #define CLK_TOP_AHB_INFRA_D2 43 macro
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H A D | mt8518-clk.h | 83 #define CLK_TOP_AHB_INFRA_D2 61 macro
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/u-boot/arch/arm/dts/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 67 #define CLK_TOP_AHB_INFRA_D2 43 macro
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H A D | mt8518-clk.h | 83 #define CLK_TOP_AHB_INFRA_D2 61 macro
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/u-boot/arch/microblaze/dts/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 67 #define CLK_TOP_AHB_INFRA_D2 43 macro
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H A D | mt8518-clk.h | 83 #define CLK_TOP_AHB_INFRA_D2 61 macro
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/u-boot/arch/mips/dts/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 67 #define CLK_TOP_AHB_INFRA_D2 43 macro
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H A D | mt8518-clk.h | 83 #define CLK_TOP_AHB_INFRA_D2 61 macro
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/u-boot/arch/x86/dts/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 67 #define CLK_TOP_AHB_INFRA_D2 43 macro
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H A D | mt8518-clk.h | 83 #define CLK_TOP_AHB_INFRA_D2 61 macro
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/u-boot/arch/xtensa/dts/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 67 #define CLK_TOP_AHB_INFRA_D2 43 macro
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H A D | mt8518-clk.h | 83 #define CLK_TOP_AHB_INFRA_D2 61 macro
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/u-boot/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 67 #define CLK_TOP_AHB_INFRA_D2 43 macro
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H A D | mt8518-clk.h | 83 #define CLK_TOP_AHB_INFRA_D2 61 macro
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/u-boot/dts/upstream/include/dt-bindings/clock/ |
H A D | mt8516-clk.h | 75 #define CLK_TOP_AHB_INFRA_D2 43 macro
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/u-boot/drivers/clk/mediatek/ |
H A D | clk-mt8518.c | 128 FACTOR1(CLK_TOP_AHB_INFRA_D2, CLK_TOP_AXIBUS_SEL, 1, 2), 1394 GATE_TOP1(CLK_TOP_I2C0, CLK_TOP_AHB_INFRA_D2, 3), 1395 GATE_TOP1(CLK_TOP_I2C1, CLK_TOP_AHB_INFRA_D2, 4), 1406 GATE_TOP1(CLK_TOP_I2C2, CLK_TOP_AHB_INFRA_D2, 16), 1477 GATE_TOP6(CLK_TOP_I2C3, CLK_TOP_AHB_INFRA_D2, 0),
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H A D | clk-mt8516.c | 108 FACTOR1(CLK_TOP_AHB_INFRA_D2, CLK_TOP_AHB_INFRA_SEL, 1, 2), 685 GATE_TOP2(CLK_TOP_66M_ETH, CLK_TOP_AHB_INFRA_D2, 19),
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