Searched refs:CFG_SYS_DCSRBAR_PHYS (Results 1 - 23 of 23) sorted by relevance

/u-boot/board/freescale/t102xrdb/
H A Dlaw.c23 #ifdef CFG_SYS_DCSRBAR_PHYS
24 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
H A Dtlb.c86 #ifdef CFG_SYS_DCSRBAR_PHYS
87 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
/u-boot/board/freescale/t104xrdb/
H A Dlaw.c23 #ifdef CFG_SYS_DCSRBAR_PHYS
24 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
H A Dtlb.c99 #ifdef CFG_SYS_DCSRBAR_PHYS
100 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
/u-boot/board/freescale/t4rdb/
H A Dlaw.c21 #ifdef CFG_SYS_DCSRBAR_PHYS
23 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
H A Dtlb.c96 #ifdef CFG_SYS_DCSRBAR_PHYS
97 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
/u-boot/board/freescale/t208xqds/
H A Dlaw.c24 #ifdef CFG_SYS_DCSRBAR_PHYS
26 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
H A Dtlb.c114 #ifdef CFG_SYS_DCSRBAR_PHYS
115 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
/u-boot/board/freescale/t208xrdb/
H A Dlaw.c24 #ifdef CFG_SYS_DCSRBAR_PHYS
26 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
H A Dtlb.c114 #ifdef CFG_SYS_DCSRBAR_PHYS
115 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
/u-boot/board/freescale/common/p_corenet/
H A Dlaw.c27 #ifdef CFG_SYS_DCSRBAR_PHYS
29 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
H A Dtlb.c133 #ifdef CFG_SYS_DCSRBAR_PHYS
134 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
/u-boot/board/keymile/kmcent2/
H A Dlaw.c15 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
H A Dtlb.c74 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c267 #ifndef CFG_SYS_DCSRBAR_PHYS
268 #define CFG_SYS_DCSRBAR_PHYS 0x80000000 /* Must be 1GB-aligned for rev1.0 */ macro
318 struct law_entry law = find_law(CFG_SYS_DCSRBAR_PHYS);
321 law_index = set_next_law(CFG_SYS_DCSRBAR_PHYS,
324 set_law(law.index, CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_1M,
H A Dcpu_init.c380 #ifdef CFG_SYS_DCSRBAR_PHYS
432 #ifdef CFG_SYS_DCSRBAR_PHYS
/u-boot/include/configs/
H A DP2041RDB.h57 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
H A Dkmcent2.h147 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
H A DT208xRDB.h69 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
H A DT102xRDB.h106 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
H A DT104xRDB.h75 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
H A DT4240RDB.h50 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
H A DT208xQDS.h69 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro

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