/u-boot/board/freescale/t102xrdb/ |
H A D | law.c | 23 #ifdef CFG_SYS_DCSRBAR_PHYS 24 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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H A D | tlb.c | 86 #ifdef CFG_SYS_DCSRBAR_PHYS 87 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
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/u-boot/board/freescale/t104xrdb/ |
H A D | law.c | 23 #ifdef CFG_SYS_DCSRBAR_PHYS 24 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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H A D | tlb.c | 99 #ifdef CFG_SYS_DCSRBAR_PHYS 100 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
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/u-boot/board/freescale/t4rdb/ |
H A D | law.c | 21 #ifdef CFG_SYS_DCSRBAR_PHYS 23 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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H A D | tlb.c | 96 #ifdef CFG_SYS_DCSRBAR_PHYS 97 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
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/u-boot/board/freescale/t208xqds/ |
H A D | law.c | 24 #ifdef CFG_SYS_DCSRBAR_PHYS 26 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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H A D | tlb.c | 114 #ifdef CFG_SYS_DCSRBAR_PHYS 115 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
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/u-boot/board/freescale/t208xrdb/ |
H A D | law.c | 24 #ifdef CFG_SYS_DCSRBAR_PHYS 26 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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H A D | tlb.c | 114 #ifdef CFG_SYS_DCSRBAR_PHYS 115 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
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/u-boot/board/freescale/common/p_corenet/ |
H A D | law.c | 27 #ifdef CFG_SYS_DCSRBAR_PHYS 29 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_32M, LAW_TRGT_IF_DCSR),
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H A D | tlb.c | 133 #ifdef CFG_SYS_DCSRBAR_PHYS 134 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
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/u-boot/board/keymile/kmcent2/ |
H A D | law.c | 15 SET_LAW(CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_4M, LAW_TRGT_IF_DCSR),
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H A D | tlb.c | 74 SET_TLB_ENTRY(1, CFG_SYS_DCSRBAR, CFG_SYS_DCSRBAR_PHYS,
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/u-boot/arch/powerpc/cpu/mpc85xx/ |
H A D | fsl_corenet_serdes.c | 267 #ifndef CFG_SYS_DCSRBAR_PHYS 268 #define CFG_SYS_DCSRBAR_PHYS 0x80000000 /* Must be 1GB-aligned for rev1.0 */ macro 318 struct law_entry law = find_law(CFG_SYS_DCSRBAR_PHYS); 321 law_index = set_next_law(CFG_SYS_DCSRBAR_PHYS, 324 set_law(law.index, CFG_SYS_DCSRBAR_PHYS, LAW_SIZE_1M,
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H A D | cpu_init.c | 380 #ifdef CFG_SYS_DCSRBAR_PHYS 432 #ifdef CFG_SYS_DCSRBAR_PHYS
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/u-boot/include/configs/ |
H A D | P2041RDB.h | 57 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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H A D | kmcent2.h | 147 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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H A D | T208xRDB.h | 69 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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H A D | T102xRDB.h | 106 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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H A D | T104xRDB.h | 75 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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H A D | T4240RDB.h | 50 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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H A D | T208xQDS.h | 69 #define CFG_SYS_DCSRBAR_PHYS 0xf00000000ull macro
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