Searched refs:CFG_REG_0_OFFSET (Results 1 - 2 of 2) sorted by relevance

/u-boot/arch/arm/include/asm/arch-omap5/
H A Ddra7xx_iodelay.h15 #define CFG_REG_0_OFFSET 0xC macro
/u-boot/arch/arm/mach-omap2/omap5/
H A Ddra7xx_iodelay.c64 clrsetbits_le32(base + CFG_REG_0_OFFSET, CFG_REG_CALIB_STRT_MASK,
67 (u32 *)(base + CFG_REG_0_OFFSET), LDELAY))
76 clrsetbits_le32(base + CFG_REG_0_OFFSET, CFG_REG_ROM_READ_MASK,
79 (u32 *)(base + CFG_REG_0_OFFSET), LDELAY))

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