Searched refs:val (Results 1 - 25 of 160) sorted by relevance

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/seL4-test-master/kernel/include/arch/x86/arch/32/mode/machine/
H A Dcpu_registers.h12 unsigned long val; local
13 asm volatile("movl %%cr3, %0" : "=r"(val), "=m"(control_reg_order));
14 return val;
17 static inline void write_cr3(unsigned long val) argument
19 asm volatile("movl %0, %%cr3" :: "r"(val), "m"(control_reg_order));
24 unsigned long val; local
25 asm volatile("movl %%cr0, %0" : "=r"(val), "=m"(control_reg_order));
26 return val;
29 static inline void write_cr0(unsigned long val) argument
31 asm volatile("movl %0, %%cr0" :: "r"(val), "
36 unsigned long val; local
43 unsigned long val; local
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H A Ddebug.h24 static inline void writeDr6Reg(word_t val) argument
29 : "r"(val));
42 static inline void writeDr7Reg(word_t val) argument
47 : "r"(val));
72 static inline void writeDrReg(uint8_t reg, word_t val)
77 asm volatile("movl %0, %%dr0 \n\t" :: "r"(val));
80 asm volatile("movl %0, %%dr1 \n\t" :: "r"(val));
83 asm volatile("movl %0, %%dr2 \n\t" :: "r"(val));
86 asm volatile("movl %0, %%dr3 \n\t" :: "r"(val));
/seL4-test-master/kernel/include/arch/x86/arch/64/mode/machine/
H A Dcpu_registers.h16 static inline void write_cr3(unsigned long val) argument
18 asm volatile("movq %0, %%cr3" :: "r"(val), "m"(control_reg_order));
23 unsigned long val; local
24 asm volatile("movq %%cr0, %0" : "=r"(val), "=m"(control_reg_order));
25 return val;
28 static inline void write_cr0(unsigned long val) argument
30 asm volatile("movq %0, %%cr0" :: "r"(val), "m"(control_reg_order));
35 unsigned long val; local
36 asm volatile("movq %%cr2, %0" : "=r"(val), "=m"(control_reg_order));
37 return val;
42 unsigned long val; local
47 write_cr4(unsigned long val) argument
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H A Ddebug.h25 static inline void writeDr6Reg(word_t val) argument
30 : "r"(val));
43 static inline void writeDr7Reg(word_t val) argument
48 : "r"(val));
73 static inline void writeDrReg(uint8_t reg, word_t val)
78 asm volatile("movq %0, %%dr0 \n\t" :: "r"(val));
81 asm volatile("movq %0, %%dr1 \n\t" :: "r"(val));
84 asm volatile("movq %0, %%dr2 \n\t" :: "r"(val));
87 asm volatile("movq %0, %%dr3 \n\t" :: "r"(val));
/seL4-test-master/projects/musllibc/src/thread/
H A Dpthread_setconcurrency.c4 int pthread_setconcurrency(int val) argument
6 if (val < 0) return EINVAL;
7 if (val > 0) return EAGAIN;
H A Dsem_getvalue.c5 int val = sem->__val[0]; local
6 *valp = val < 0 ? 0 : val;
H A Dsem_post.c6 int val, waiters, priv = sem->__val[2]; local
8 val = sem->__val[0];
10 if (val == SEM_VALUE_MAX) {
14 } while (a_cas(sem->__val, val, val+1+(val<0)) != val);
15 if (val<0 || waiters) __wake(sem->__val, 1, priv);
H A Dpthread_rwlock_tryrdlock.c5 int val, cnt; local
7 val = rw->_rw_lock;
8 cnt = val & 0x7fffffff;
11 } while (a_cas(&rw->_rw_lock, val, val+1) != val);
H A Dsem_trywait.c6 int val; local
7 while ((val=sem->__val[0]) > 0) {
8 int new = val-1-(val==1 && sem->__val[1]);
9 if (a_cas(sem->__val, val, new)==val) return 0;
H A Dpthread_rwlock_unlock.c5 int val, cnt, waiters, new, priv = rw->_rw_shared^128; local
8 val = rw->_rw_lock;
9 cnt = val & 0x7fffffff;
11 new = (cnt == 0x7fffffff || cnt == 1) ? 0 : val-1;
12 } while (a_cas(&rw->_rw_lock, val, new) != val);
14 if (!new && (waiters || val<0))
H A D__futex.c4 int __futex(volatile int *addr, int op, int val, void *ts) argument
6 return syscall(SYS_futex, addr, op, val, ts);
H A D__wait.c3 void __wait(volatile int *addr, volatile int *waiters, int val, int priv) argument
8 if (*addr==val) a_spin();
12 while (*addr==val) {
13 __syscall(SYS_futex, addr, FUTEX_WAIT|priv, val, 0) != -ENOSYS
14 || __syscall(SYS_futex, addr, FUTEX_WAIT, val, 0);
/seL4-test-master/tools/seL4/elfloader-tool/src/arch-arm/32/
H A Dcpuid.c14 uint32_t val; local
15 asm volatile("mrc p15, 0, %0, c0, c0, 5" : "=r"(val) :: "cc");
16 return val & MPIDR_MASK;
23 uint32_t val; local
24 asm volatile("mrs %0, cpsr" : "=r"(val) :: "cc");
25 return ((val & CPSR_MODE_MASK) == CPSR_MODE_HYPERVISOR);
31 uint32_t val; local
32 asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r"(val) :: "cc");
33 return val;
/seL4-test-master/tools/seL4/elfloader-tool/src/arch-arm/64/
H A Dcpuid.c15 uint64_t val; local
16 asm volatile("mrs %x0, mpidr_el1" : "=r"(val) :: "cc");
17 return val & MPIDR_MASK;
23 uint32_t val; local
24 asm volatile("mrs %x0, CurrentEL" : "=r"(val) :: "cc");
25 return (val == CURRENTEL_EL2);
30 uint32_t val; local
31 asm volatile("mrs %x0, midr_el1" : "=r"(val) :: "cc");
32 return val;
/seL4-test-master/kernel/include/arch/arm/armv/armv7ve/armv/
H A Dbenchmark.h21 word_t val; local
22 MRC(PMINTENSET, val);
23 val |= BIT(CCNT_INDEX);
24 MCR(PMINTENSET, val);
29 word_t val = BIT(CCNT_INDEX); local
30 MCR(PMOVSR, val);
/seL4-test-master/kernel/include/arch/arm/armv/armv7-a/armv/
H A Dbenchmark.h21 word_t val; local
22 MRC(PMINTENSET, val);
23 val |= BIT(CCNT_INDEX);
24 MCR(PMINTENSET, val);
29 word_t val = BIT(CCNT_INDEX); local
30 MCR(PMOVSR, val);
/seL4-test-master/kernel/include/arch/arm/armv/armv8-a/32/armv/
H A Dbenchmark.h21 word_t val; local
22 MRC(PMINTENSET, val);
23 val |= BIT(CCNT_INDEX);
24 MCR(PMINTENSET, val);
29 word_t val = BIT(CCNT_INDEX); local
30 MCR(PMOVSR, val);
/seL4-test-master/kernel/include/arch/arm/armv/armv8-a/64/armv/
H A Dbenchmark.h21 uint32_t val; local
22 MRS(PMINTENSET, val);
23 val |= BIT(CCNT_INDEX);
24 MSR(PMINTENSET, val);
29 uint32_t val = BIT(CCNT_INDEX); local
30 MSR(PMOVSR, val);
/seL4-test-master/kernel/src/arch/arm/armv/armv8-a/64/
H A Duser_access.c26 uint32_t val = PMUSERENR_EL0_EN; local
27 MSR("PMUSERENR_EL0", val);
33 uint32_t val = 0; local
35 val |= EL0PCTEN;
38 val |= EL0PTEN;
41 val |= EL0VCTEN;
44 val |= EL0VTEN;
46 MSR("CNTKCTL_EL1", val);
49 val = 0;
51 val |
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/seL4-test-master/projects/seL4_libs/libsel4bench/arch_include/arm/cpu/arm1136jf-s/sel4bench/cpu/
H A Dprivate.h70 static CACHESENSFN void sel4bench_private_set_pmnc(sel4bench_arm1136_pmnc_t val) argument
84 : "r"(val.raw)
89 sel4bench_arm1136_pmnc_t val; local
92 : "=r"(val.raw)
95 return val;
103 uint32_t val; local
106 : "=r"(val)
108 return val;
116 uint32_t val; local
119 : "=r"(val)
123 sel4bench_private_set_pmn0(uint32_t val) argument
136 uint32_t val; local
143 sel4bench_private_set_pmn1(uint32_t val) argument
[all...]
/seL4-test-master/projects/seL4_libs/libsel4bench/arch_include/arm/armv/armv7-a/sel4bench/armv/
H A Dprivate.h94 static FASTFN void sel4bench_private_write_pmcr(uint32_t val) argument
99 : "r"(val)
104 uint32_t val; local
107 : "=r"(val)
110 return val;
152 uint32_t val; local
155 : "=r"(val)
158 return val;
160 static FASTFN void sel4bench_private_write_pmcnt(uint32_t val) argument
164 : "=r"(val)
174 sel4bench_private_write_pmnxsel(uint32_t val) argument
191 uint32_t val; local
200 sel4bench_private_write_evtsel(uint32_t val) argument
[all...]
/seL4-test-master/kernel/include/arch/arm/armv/armv6/armv/
H A Dbenchmark.h24 word_t val; local
25 MRC(PMCR, val);
26 val |= BIT(PMCR_CCNT_IRQ);
27 MCR(PMCR, val);
/seL4-test-master/projects/sel4_projects_libs/libsel4vmmplatsupport/src/sel4_arch/aarch64/
H A Dsmc.c17 seL4_Word smc_set_return_value(seL4_UserContext *u, seL4_Word val) argument
19 u->x0 = val;
42 void smc_set_arg(seL4_UserContext *u, seL4_Word arg, seL4_Word val) argument
46 u->x1 = val;
49 u->x2 = val;
52 u->x3 = val;
55 u->x4 = val;
58 u->x5 = val;
61 u->x6 = val;
/seL4-test-master/projects/sel4_projects_libs/libsel4vmmplatsupport/src/sel4_arch/arm_hyp/
H A Dsmc.c17 seL4_Word smc_set_return_value(seL4_UserContext *u, seL4_Word val) argument
19 u->r0 = val;
42 void smc_set_arg(seL4_UserContext *u, seL4_Word arg, seL4_Word val) argument
46 u->r1 = val;
49 u->r2 = val;
52 u->r3 = val;
55 u->r4 = val;
58 u->r5 = val;
61 u->r6 = val;
/seL4-test-master/projects/musllibc/src/locale/
H A Dlocale_map.c27 const struct __locale_map *__get_locale(int cat, const char *val) argument
37 if (!*val) {
38 (val = getenv("LC_ALL")) && *val ||
39 (val = getenv(envvars[cat])) && *val ||
40 (val = getenv("LANG")) && *val ||
41 (val = "C.UTF-8");
45 for (n=0; n<LOCALE_NAME_MAX && val[
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