Searched refs:r1 (Results 1 - 25 of 85) sorted by relevance

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/seL4-test-master/projects/musllibc/crt/microblaze/
H A Dcrtn.s2 lwi r15, r1, 0
4 addi r1, r1, 32
7 lwi r15, r1, 0
9 addi r1, r1, 32
H A Dcrti.s5 addi r1, r1, -32
6 swi r15, r1, 0
12 addi r1, r1, -32
13 swi r15, r1, 0
/seL4-test-master/projects/musllibc/crt/or1k/
H A Dcrtn.s2 l.lwz r9,0(r1)
4 l.addi r1,r1,4
7 l.lwz r9,0(r1)
9 l.addi r1,r1,4
H A Dcrti.s4 l.addi r1,r1,-4
5 l.sw 0(r1),r9
10 l.addi r1,r1,-4
11 l.sw 0(r1),r9
/seL4-test-master/tools/seL4/elfloader-tool/src/arch-arm/armv/armv6/32/
H A Dmmu.S26 bic r1, r0, #(1 << 12)
27 mcr SCTLR(r1)
30 mov r1, #0
32 mcr DCIALL(r1)
37 mcr DCALL(r1)
40 mcr IIALL(r1)
43 mov r1, #1
44 mcr DACR(r1)
48 orr r1, r2, #0x19
49 mcr TTBR0(r1)
[all...]
/seL4-test-master/kernel/src/arch/arm/armv/armv6/
H A Dmachine_asm.S16 mrc p15, 0, r1, c10, c0, 0
17 orr r1, r1, #1
18 mcr p15, 0, r1, c10, c0, 0
31 mrc p15, 0, r1, c10, c0, 0
32 bic r1, r1, #1
33 mcr p15, 0, r1, c10, c0, 0
/seL4-test-master/projects/musllibc/src/thread/s390x/
H A D__tls_get_offset.s10 ear %r1, %a0
11 sllg %r1, %r1, 32
12 ear %r1, %a1
14 sgr %r2, %r1
/seL4-test-master/tools/seL4/elfloader-tool/src/arch-arm/armv/armv7-a/32/
H A Dmmu.S24 mcr IIALL(r1)
44 mrc SCTLR(r1)
45 and r1, r1, #(1 << 2)
46 cmp r1, #0
51 mrc SCTLR(r1)
52 bic r1, r1, #(1 << 12) /* Disable I-cache */
53 bic r1, r1, #(
[all...]
H A Dmmu-hyp.S39 mrc HSCTLR(r1)
40 and r1, r1, #(1 << 2)
41 cmp r1, #0
45 mrc HSCTLR(r1)
46 bic r1, r1, #(1 << 12) /* Disable I-cache */
47 bic r1, r1, #(1 << 2) /* Disable D-Cache */
48 bic r1, r
[all...]
/seL4-test-master/tools/seL4/elfloader-tool/src/arch-arm/armv/armv8-a/32/
H A Dmmu.S24 mcr IIALL(r1)
44 mrc SCTLR(r1)
45 and r1, r1, #(1 << 2)
46 cmp r1, #0
51 mrc SCTLR(r1)
52 bic r1, r1, #(1 << 12) /* Disable I-cache */
53 bic r1, r1, #(
[all...]
H A Dmmu-hyp.S39 mrc HSCTLR(r1)
40 and r1, r1, #(1 << 2)
41 cmp r1, #0
45 mrc HSCTLR(r1)
46 bic r1, r1, #(1 << 12) /* Disable I-cache */
47 bic r1, r1, #(1 << 2) /* Disable D-Cache */
48 bic r1, r
[all...]
/seL4-test-master/tools/seL4/elfloader-tool/src/arch-arm/armv/armv7ve/32/
H A Dmmu.S24 mcr IIALL(r1)
44 mrc SCTLR(r1)
45 and r1, r1, #(1 << 2)
46 cmp r1, #0
51 mrc SCTLR(r1)
52 bic r1, r1, #(1 << 12) /* Disable I-cache */
53 bic r1, r1, #(
[all...]
H A Dmmu-hyp.S39 mrc HSCTLR(r1)
40 and r1, r1, #(1 << 2)
41 cmp r1, #0
45 mrc HSCTLR(r1)
46 bic r1, r1, #(1 << 12) /* Disable I-cache */
47 bic r1, r1, #(1 << 2) /* Disable D-Cache */
48 bic r1, r
[all...]
/seL4-test-master/projects/musllibc/src/internal/or1k/
H A Dsyscall.s6 l.lwz r3, 0(r1)
7 l.lwz r4, 4(r1)
8 l.lwz r5, 8(r1)
9 l.lwz r6, 12(r1)
10 l.lwz r7, 16(r1)
11 l.lwz r8, 20(r1)
/seL4-test-master/tools/seL4/elfloader-tool/src/plat/imx7/
H A Dhead_smp.S42 1: ldrex r1, [r0]
43 add r1, r1, #1
44 strex r2, r1, [r0]
50 mul r1, r0
51 add r3, r1
/seL4-test-master/projects/musllibc/src/setjmp/arm/
H A Dlongjmp.s9 movs r0,r1
15 adr r1,1f
17 ldr r1,[r1,r2]
19 tst r1,#0x260
21 tst r1,#0x20
24 2: tst r1,#0x40
31 2: tst r1,#0x200
/seL4-test-master/projects/musllibc/src/setjmp/arm_sel4/
H A Dlongjmp.s9 movs r0,r1
15 adr r1,1f
17 ldr r1,[r1,r2]
19 tst r1,#0x260
21 tst r1,#0x20
24 2: tst r1,#0x40
31 2: tst r1,#0x200
/seL4-test-master/projects/musllibc/src/thread/arm/
H A D__aeabi_read_tp.s5 push {r1,r2,r3,lr}
7 pop {r1,r2,r3,lr}
/seL4-test-master/projects/seL4_libs/libsel4debug/src/sel4_arch/aarch32/
H A Dtrampoline.S25 mov r0, r1
26 mov r1, r2
/seL4-test-master/projects/sel4runtime/src/sel4_arch/aarch32/
H A D__aeabi_read_tp.s34 * be corrupted by the [AAPCS] (ip, lr, and CPSR). Registers r1 -r3 must
41 push {r1,r2,r3,lr}
43 pop {r1,r2,r3,lr}
/seL4-test-master/projects/sel4runtime/src/sel4_arch/arm_hyp/
H A D__aeabi_read_tp.s34 * be corrupted by the [AAPCS] (ip, lr, and CPSR). Registers r1 -r3 must
41 push {r1,r2,r3,lr}
43 pop {r1,r2,r3,lr}
/seL4-test-master/projects/musllibc/arch/s390x/
H A Dsyscall_arch.h12 register long r1 __asm__("r1") = n;
14 __asm_syscall("=r"(r2), "r"(r1));
19 register long r1 __asm__("r1") = n;
21 __asm_syscall("+r"(r2), "r"(r1));
26 register long r1 __asm__("r1") = n;
29 __asm_syscall("+r"(r2), "r"(r1), "r"(r3));
34 register long r1 __asm_
[all...]
/seL4-test-master/projects/musllibc/src/thread/or1k/
H A Dclone.s13 l.lwz r5, 0(r1)
14 l.lwz r6, 8(r1)
15 l.lwz r7, 4(r1)
25 1: l.lwz r11, 0(r1)
27 l.lwz r3, 4(r1)
/seL4-test-master/projects/musllibc/src/thread/sh/
H A Datomics.s2 * pr and r1 are also clobbered (by jsr & r1 as temp).
14 mov r15,r1
20 1: mov r1,r15
30 mov r0,r1
32 0: movli.l @r1,r0
36 movco.l r0,@r1
42 mov r1,r0
47 mov r0,r1
52 mov.l @r1,r
[all...]
/seL4-test-master/tools/seL4/elfloader-tool/src/arch-arm/32/
H A Dcrt0.S33 mrc ACTLR(r1)
34 orr r1, r1, #(1 << 6) /* enable SMP bit */
36 orr r1, r1, #1 /* enable FW bit */
38 mcr ACTLR(r1)
60 // r1 = _DYNAMIC pointer (current base address)
62 mov r8, r1 // move to r8
65 adr r1, LC2
66 ldmia r1, {r
[all...]

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