Searched refs:base_addr (Results 1 - 25 of 32) sorted by relevance

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/seL4-test-master/projects/util_libs/libplatsupport/include/platsupport/
H A Dpmem.h30 uint64_t base_addr; member in struct:pmem_region
45 void *vaddr = ps_io_map(&ops->io_mapper, region.base_addr, region.length, cached, flags);
47 ZF_LOGE("Failed to map paddr %p length %" PRIu64 "\n", (void *) (uintptr_t) region.base_addr, region.length);
/seL4-test-master/projects/util_libs/libethdrivers/src/plat/zynq7000/uboot/
H A Dnetdev.h36 int calxedaxgmac_initialize(u32 id, ulong base_addr);
37 int cs8900_initialize(u8 dev_num, int base_addr);
40 int designware_initialize(ulong base_addr, u32 interface);
47 int ep93xx_eth_initialize(u8 dev_num, int base_addr);
49 int ethoc_initialize(u8 dev_num, int base_addr);
58 int ks8851_mll_initialize(u8 dev_num, int base_addr);
59 int lan91c96_initialize(u8 dev_num, int base_addr);
68 int mvneta_initialize(bd_t *bis, int base_addr, int devnum, int phy_addr);
80 int smc91111_initialize(u8 dev_num, int base_addr);
81 int smc911x_initialize(u8 dev_num, int base_addr);
[all...]
H A Dzynq_gem.c399 struct eth_device *zynq_gem_initialize(phys_addr_t base_addr, argument
430 sprintf(dev->name, "Gem.%lx", base_addr);
432 dev->iobase = base_addr;
435 struct zynq_gem_regs *regs = (struct zynq_gem_regs *)base_addr;
/seL4-test-master/projects/util_libs/libpci/include/pci/
H A Dpci_config.h27 uint32_t base_addr[6]; member in struct:libpci_device_iocfg
91 return (uint64_t) cfg->base_addr[index];
96 return ((uint64_t) cfg->base_addr[index]) | (((uint64_t) cfg->base_addr[index + 1]) << 32);
117 if (cfg->base_addr[i] == 0 || cfg->base_addr_64H[i]) continue;
129 if (cfg->base_addr[i] == 0 || cfg->base_addr_64H[i]) continue;
146 if (cfg->base_addr[i] == 0 || cfg->base_addr_64H[i]) continue;
157 printf(" base_addr[%d]: 0x%"PRIx64"\n", i, libpci_device_iocfg_get_baseaddr(cfg, i));
H A Dvirtual_device.h82 uint32_t base_addr, /* correctly aligned new address. */
89 uint32_t base_addr, /* correctly aligned new address. */
95 uint32_t base_addr, /* correctly aligned new address. */
103 uint32_t base_addr, /* correctly aligned new address. */
/seL4-test-master/projects/util_libs/libplatsupport/src/plat/pc99/
H A Dhpet.c130 hpet_timer_t *timer = hpet_get_hpet_timer(hpet->base_addr, 0);
132 *hpet_get_general_config(hpet->base_addr) |= BIT(ENABLE_CNF);
148 hpet_timer_t *timer = hpet_get_hpet_timer(hpet->base_addr, 0);
154 *hpet_get_general_config(hpet->base_addr) &= ~BIT(ENABLE_CNF);
166 time = *hpet_get_main_counter(hpet->base_addr);
169 } while (CONFIG_WORD_SIZE == 32 && ((uint32_t) (time >> 32llu)) != ((uint32_t *)hpet_get_main_counter(hpet->base_addr))[1]);
176 hpet_timer_t *timer = hpet_get_hpet_timer(hpet->base_addr, 0);
211 hpet->base_addr = config.vaddr;
212 hpet_timer_t *hpet_timer = hpet_get_hpet_timer(hpet->base_addr, 0);
237 *hpet_get_general_config(hpet->base_addr)
[all...]
/seL4-test-master/projects/sel4_projects_libs/libsel4vmmplatsupport/src/arch/x86/drivers/
H A Dvmm_pci_helper.c22 if (cfg->base_addr[i] == 0) {
39 ZF_LOGE("Failed to reserve PCI bar %p size %zu", (void *)(uintptr_t)cfg->base_addr[i], size);
42 int err = map_ut_alloc_reservation_with_base_paddr(vm, (uintptr_t)cfg->base_addr[i], reservation);
44 ZF_LOGE("Failed to map PCI bar %p size %zu", (void *)(uintptr_t)cfg->base_addr[i], size);
55 int error = vm_enable_passthrough_ioport(vm->vcpus[BOOT_VCPU], cfg->base_addr[i], cfg->base_addr[i] + size - 1);
60 bars[bar].address = cfg->base_addr[i];
/seL4-test-master/projects/util_libs/libpci/src/
H A Dvirtual_device.c92 uint32_t base_addr,
104 self->rebase_addr_virtdevice(self, base_addr_index, base_addr,
113 uint32_t base_addr,
119 self->rebase_ioaddr_virtdevice(self, base_addr_index, base_addr,
126 uint32_t base_addr,
139 if ((base_addr & size_mask) != base_addr) {
140 printf("ERROR: address alignment invalid 0x%x to mask 0x%x", base_addr, size_mask);
150 self->rebased_addr[base_addr_index] |= base_addr;
162 uint32_t base_addr,
90 libpci_vdevice_rebase_addr_realdevice(libpci_vdevice_t* self, int base_addr_index, uint32_t base_addr, libpci_device_t* dev) argument
111 libpci_vdevice_rebase_ioaddr_realdevice(libpci_vdevice_t* self, int base_addr_index, uint32_t base_addr, libpci_device_t* dev) argument
124 libpci_vdevice_rebase_addr_virtdevice(libpci_vdevice_t* self, int base_addr_index, uint32_t base_addr, uint32_t size_mask, bool prefetch, bool LWord64) argument
160 libpci_vdevice_rebase_ioaddr_virtdevice(libpci_vdevice_t* self, int base_addr_index, uint32_t base_addr, uint32_t size_mask) argument
[all...]
H A Dpci.c189 cfg->base_addr[i] = cfg->base_addr_raw[i];
214 cfg->base_addr[i] = bios_base_addr & PCI_BASE_ADDRESS_MEM_MASK;
216 cfg->base_addr[i] = bios_base_addr & PCI_BASE_ADDRESS_MEM_MASK;
219 cfg->base_addr[i] = bios_base_addr & PCI_BASE_ADDRESS_IO_MASK;
/seL4-test-master/projects/util_libs/libethdrivers/src/plat/tx2/
H A Dtx2.h38 void *tx2_initialise(uintptr_t base_addr, ps_io_ops_t *io_ops);
H A Dtx2.c322 uintptr_t base_addr = (uintptr_t)plat_config->buffer_addr; local
337 eth_dev = (struct eth_device *)tx2_initialise(base_addr, &io_ops);
/seL4-test-master/projects/seL4_libs/libsel4platsupport/src/arch/x86/
H A Dpmem.c41 region_list[i].base_addr = mmap[i].base_addr;
/seL4-test-master/projects/util_libs/libplatsupport/plat_include/pc99/platsupport/plat/
H A Dhpet.h43 void *base_addr; member in struct:hpet
/seL4-test-master/kernel/include/arch/x86/arch/kernel/
H A Dmultiboot.h25 uint64_t base_addr; member in struct:multiboot_mmap
/seL4-test-master/projects/musllibc/include/net/
H A Dif.h67 unsigned short int base_addr; member in struct:ifmap
/seL4-test-master/kernel/libsel4/arch_include/x86/sel4/arch/
H A Dbootinfo_types.h120 uint64_t base_addr; // physical address of start of this region member in struct:seL4_X86_mb_mmap
/seL4-test-master/projects/util_libs/libethdrivers/src/plat/zynq7000/
H A Dzynq_gem.h153 struct eth_device *zynq_gem_initialize(phys_addr_t base_addr,
H A Dzynq7000.c401 uint32_t base_addr = (uint32_t)plat_config->buffer_addr; local
426 eth_dev = (struct eth_device *)zynq_gem_initialize(base_addr,
/seL4-test-master/projects/sel4_projects_libs/libsel4vm/src/arch/arm/
H A Dfault.h45 seL4_Word base_addr; member in struct:fault
/seL4-test-master/projects/sel4_projects_libs/libsel4vm/src/
H A Dguest_ram.c325 uintptr_t base_addr; local
327 ram_reservation = vm_reserve_anon_memory(vm, bytes, default_ram_fault_callback, NULL, &base_addr);
337 err = expand_guest_ram_region(vm, base_addr, bytes);
344 return base_addr;
/seL4-test-master/projects/util_libs/libplatsupport/src/plat/bcm2837/
H A Dltimer.c49 .base_addr = SP804_TIMER_PADDR,
54 .base_addr = SYSTEM_TIMER_PADDR,
/seL4-test-master/projects/util_libs/libplatsupport/src/plat/hifive/
H A Dltimer.c59 .base_addr = PWM0_PADDR,
64 .base_addr = PWM1_PADDR,
/seL4-test-master/projects/util_libs/libplatsupport/src/plat/am335x/
H A Di2c.c38 .base_addr = AM335X_I2C0_PADDR,
43 .base_addr = AM335X_I2C1_PADDR,
48 .base_addr = AM335X_I2C2_PADDR,
/seL4-test-master/projects/util_libs/libplatsupport/src/plat/odroidc2/
H A Dltimer.c38 .base_addr = TIMER_MAP_BASE,
/seL4-test-master/projects/util_libs/libplatsupport/src/
H A Dfdt.c135 curr_pmem.base_addr = READ_CELL(num_address_cells, curr, 0);

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