Searched refs:active (Results 1 - 17 of 17) sorted by relevance

/seL4-test-master/projects/util_libs/libplatsupport/src/
H A Dtqueue.c90 if (tq->array[id].active) {
92 tq->array[id].active = false;
111 if (tq->array[id].active) {
116 tq->array[id].active = true;
137 if (tq->array[id].active) {
141 tq->array[id].active = false;
153 if (t->active) {
157 /* check if it is active again, as callback may have deactivated the timeout */
158 if (t->active) {
164 t->active
[all...]
/seL4-test-master/projects/util_libs/libplatsupport/include/platsupport/
H A Dtqueue.h39 bool active; member in struct:tqueue_node
/seL4-test-master/projects/musllibc/src/locale/
H A Ddcngettext.c15 volatile int active; member in struct:binding
27 if (!strcmp(p->domainname, domainname) && p->active) {
74 a_store(&p->active, 1);
78 a_store(&q->active, 0);
/seL4-test-master/tools/seL4/elfloader-tool/src/plat/imx6/
H A Dplatform_init.c148 uint32_t active[32]; member in struct:gicd_map
/seL4-test-master/tools/seL4/elfloader-tool/src/plat/tk1/
H A Dplatform_init.c224 uint32_t active[32]; member in struct:gicd_map
/seL4-test-master/projects/sel4_projects_libs/libsel4vm/src/arch/arm/vgic/
H A Dvgic.c152 uint32_t active[31]; /* [0x300, 0x380) */ member in struct:gic_dist_map
420 gic_dist->active[IRQ_IDX(irq)] |= IRQ_BIT(irq);
422 gic_dist->active[IRQ_IDX(irq)] &= ~IRQ_BIT(irq);
442 return !!(gic_dist->active[IRQ_IDX(irq)] & IRQ_BIT(irq));
705 reg = gic_dist->active[reg_offset];
885 gic_dist->active[reg_offset] = fault_emulate(fault, gic_dist->active[reg_offset]);
/seL4-test-master/kernel/src/arch/arm/object/
H A Dvcpu.c32 static void vcpu_save(vcpu_t *vcpu, bool_t active) argument
39 /* If we aren't active then this state already got stored when
41 if (active) {
54 armv_vcpu_save(vcpu, active);
130 /* Current VCPU being active should indicate that the current thread
145 /* We shouldn't get a VGICMaintenance interrupt while a VCPU isn't active,
152 printf("Received VGIC maintenance without active VCPU!\n");
204 /* Current VCPU being active should indicate that the current thread
/seL4-test-master/kernel/include/arch/arm/armv/armv7ve/armv/
H A Dvcpu.h682 static inline void armv_vcpu_save(vcpu_t *vcpu, bool_t active) argument
699 if (active && nativeThreadUsingFPU(vcpu->vcpuTCB)) {
/seL4-test-master/kernel/include/arch/arm/armv/armv7-a/armv/
H A Dvcpu.h682 static inline void armv_vcpu_save(vcpu_t *vcpu, bool_t active) argument
699 if (active && nativeThreadUsingFPU(vcpu->vcpuTCB)) {
/seL4-test-master/kernel/include/arch/arm/armv/armv8-a/32/armv/
H A Dvcpu.h682 static inline void armv_vcpu_save(vcpu_t *vcpu, bool_t active) argument
699 if (active && nativeThreadUsingFPU(vcpu->vcpuTCB)) {
/seL4-test-master/kernel/include/arch/arm/arch/machine/
H A Dgic_v2.h60 uint32_t active[32]; /* [0x300, 0x380) */ member in struct:gic_dist_map
175 * GIC has 4 states: pending->active(+pending)->inactive
176 * seL4 expects two states: active->inactive.
177 * We ignore the active state in GIC to conform
229 /* Active priority: bitfield of active priorities */
/seL4-test-master/projects/util_libs/libethdrivers/src/plat/zynq7000/uboot/
H A Dethtool.h415 * @active: mask of currently enabled features
421 uint32_t active; member in struct:ethtool_get_features_block
/seL4-test-master/projects/util_libs/libethdrivers/src/plat/tx2/uboot/
H A Dethtool.h414 * @active: mask of currently enabled features
420 uint32_t active; member in struct:ethtool_get_features_block
/seL4-test-master/projects/util_libs/libethdrivers/src/plat/imx6/uboot/
H A Dethtool.h413 * @active: mask of currently enabled features
419 uint32_t active; member in struct:ethtool_get_features_block
/seL4-test-master/kernel/include/arch/arm/armv/armv8-a/64/armv/
H A Dvcpu.h581 static inline void armv_vcpu_save(vcpu_t *vcpu, UNUSED bool_t active) argument
/seL4-test-master/kernel/manual/parts/
H A Dthreads.tex120 referred to as \emph{active}. Budget charging and replenishment rules are different for round-robin
182 the scheduling context is active, it will be added to the scheduler.
216 communicate with a passive thread. When an active thread invokes an endpoint with
217 \apifunc{seL4\_Call}{sel4_call} and rendezvous with a passive thread, the active thread's scheduling
260 Threads are only eligible for scheduling if they have an active scheduling context.
608 is active.
H A Dio.tex295 Each context bank allows the SMMU to maintain an active translation context with
439 not possible with multiple active context banks.

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