Searched refs:CLK_PLL2 (Results 1 - 2 of 2) sorted by relevance

/seL4-test-master/projects/util_libs/libplatsupport/plat_include/imx6/platsupport/plat/
H A Dclock.h17 CLK_PLL2, enumerator in enum:clk_id
33 // CLK_PLL2 = CLK_SYS
/seL4-test-master/projects/util_libs/libplatsupport/src/plat/imx6/
H A Dclock.c406 clk_t* parent = clk_get_clock(clk_get_clock_sys(clk), CLK_PLL2);
675 [CLK_PLL2 ] = &pll2_clk,
693 [CLK_PLL2 ] = 528 * MHZ,

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