Searched refs:ARCH_DMA_MINALIGN (Results 1 - 7 of 7) sorted by relevance
/seL4-test-master/projects/util_libs/libethdrivers/src/plat/tx2/uboot/ |
H A D | tx2_configs.h | 20 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro 22 #define ARCH_DMA_MINALIGN 16 macro 61 #define EQOS_MAX_PACKET_SIZE EQOS_ALIGN(1568, ARCH_DMA_MINALIGN)
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H A D | dwc_eth_qos.h | 217 /* We assume ARCH_DMA_MINALIGN >= 16; 16 is the EQOS HW minimum */ 218 #define EQOS_DESCRIPTOR_ALIGN ARCH_DMA_MINALIGN 221 EQOS_DESCRIPTOR_SIZE, ARCH_DMA_MINALIGN) 222 #define EQOS_BUFFER_ALIGN ARCH_DMA_MINALIGN
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H A D | net.h | 38 #define PKTALIGN ARCH_DMA_MINALIGN
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/seL4-test-master/projects/util_libs/libethdrivers/src/plat/zynq7000/uboot/ |
H A D | zynq-common.h | 26 #define ARCH_DMA_MINALIGN CONFIG_SYS_CACHELINE_SIZE macro 28 #define ARCH_DMA_MINALIGN 64 macro
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H A D | net.h | 37 #define PKTALIGN ARCH_DMA_MINALIGN
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/seL4-test-master/projects/util_libs/libethdrivers/src/plat/tx2/ |
H A D | tx2.c | 56 dma_addr_t rx_ring = dma_alloc_pin(dma_man, ALIGN_UP(sizeof(struct eqos_desc) * dev->rx_size, ARCH_DMA_MINALIGN), 0, 57 ARCH_DMA_MINALIGN); 65 dma_addr_t tx_ring = dma_alloc_pin(dma_man, ALIGN_UP(sizeof(struct eqos_desc) * dev->tx_size, ARCH_DMA_MINALIGN), 0, 66 ARCH_DMA_MINALIGN); 326 eth_driver->dma_alignment = ARCH_DMA_MINALIGN;
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/seL4-test-master/projects/util_libs/libethdrivers/src/plat/zynq7000/ |
H A D | zynq7000.c | 81 dma_addr_t rx_ring = dma_alloc_pin(dma_man, sizeof(struct emac_bd) * dev->rx_size, 0, ARCH_DMA_MINALIGN); 89 dma_addr_t tx_ring = dma_alloc_pin(dma_man, sizeof(struct emac_bd) * dev->tx_size, 0, ARCH_DMA_MINALIGN); 406 eth_driver->dma_alignment = ARCH_DMA_MINALIGN;
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