| /seL4-refos-master/libs/libplatsupport/src/mach/zynq/ |
| H A D | serial.c | 147 uint32_t cr; /* 0x00 Control Register */ member in struct:zynq_uart_regs
175 regs->cr &= ~UART_CR_TXDIS;
176 regs->cr |= UART_CR_TXEN;
182 regs->cr &= ~UART_CR_RXDIS;
183 regs->cr |= UART_CR_RXEN;
331 regs->cr &= ~UART_CR_RXEN;
334 regs->cr &= ~UART_CR_TXEN;
347 regs->cr |= UART_CR_TXRES | UART_CR_RXRES;
348 while (regs->cr & (UART_CR_TXRES | UART_CR_RXRES));
465 regs->cr |
[all...] |
| H A D | axi_uartlite.c | 37 uint32_t cr; /* 0xC Control Register */ member in struct:zynq_axi_uartlite_regs
141 regs->cr |= (AXI_UARTLITE_CR_RST_TX_FIFO | AXI_UARTLITE_CR_RST_RX_FIFO);
144 regs->cr &= ~AXI_UARTLITE_CR_ENABLE_INTR;
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| /seL4-refos-master/projects/util_libs/libplatsupport/src/mach/zynq/ |
| H A D | serial.c | 147 uint32_t cr; /* 0x00 Control Register */ member in struct:zynq_uart_regs
175 regs->cr &= ~UART_CR_TXDIS;
176 regs->cr |= UART_CR_TXEN;
182 regs->cr &= ~UART_CR_RXDIS;
183 regs->cr |= UART_CR_RXEN;
331 regs->cr &= ~UART_CR_RXEN;
334 regs->cr &= ~UART_CR_TXEN;
347 regs->cr |= UART_CR_TXRES | UART_CR_RXRES;
348 while (regs->cr & (UART_CR_TXRES | UART_CR_RXRES));
465 regs->cr |
[all...] |
| H A D | axi_uartlite.c | 37 uint32_t cr; /* 0xC Control Register */ member in struct:zynq_axi_uartlite_regs
141 regs->cr |= (AXI_UARTLITE_CR_RST_TX_FIFO | AXI_UARTLITE_CR_RST_RX_FIFO);
144 regs->cr &= ~AXI_UARTLITE_CR_ENABLE_INTR;
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| /seL4-refos-master/libs/libmuslc/src/setjmp/powerpc64/ |
| H A D | longjmp.s | 10 # 1) restore cr
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| H A D | setjmp.s | 16 # 1) store cr
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| /seL4-refos-master/projects/refos/impl/apps/console_server/src/ |
| H A D | ega_vterm.c | 155 char cr = '\r'; local
157 vterm_push_bytes(s->vt, &cr, 1);
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| /seL4-refos-master/apps/console_server/src/ |
| H A D | ega_vterm.c | 155 char cr = '\r'; local
157 vterm_push_bytes(s->vt, &cr, 1);
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| /seL4-refos-master/libs/libplatsupport/src/arch/arm/ |
| H A D | dma330.c | 195 uint32_t cr[5]; /* RO */ member in struct:dma330_map::__anon536
366 v = regs->config.cr[0];
368 v = regs->config.cr[1];
370 v = regs->config.cr[2];
372 v = regs->config.cr[3];
374 v = regs->config.cr[4];
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| /seL4-refos-master/projects/util_libs/libplatsupport/src/arch/arm/ |
| H A D | dma330.c | 195 uint32_t cr[5]; /* RO */ member in struct:dma330_map::__anon967
366 v = regs->config.cr[0];
368 v = regs->config.cr[1];
370 v = regs->config.cr[2];
372 v = regs->config.cr[3];
374 v = regs->config.cr[4];
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| /seL4-refos-master/kernel/include/arch/arm/arch/machine/ |
| H A D | debug.h | 257 bcr.words[0] = t->tcbArch.tcbContext.breakpointState.breakpoint[bp_num].cr;
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| /seL4-refos-master/kernel/include/arch/arm/arch/32/mode/machine/ |
| H A D | registerset.h | 189 word_t cr, vr; member in struct:debug_register_pair
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| /seL4-refos-master/kernel/src/arch/arm/machine/ |
| H A D | debug.c | 307 return t->tcbArch.tcbContext.breakpointState.breakpoint[index].cr;
319 return t->tcbArch.tcbContext.breakpointState.watchpoint[index].cr;
331 t->tcbArch.tcbContext.breakpointState.breakpoint[index].cr = val;
343 t->tcbArch.tcbContext.breakpointState.watchpoint[index].cr = val;
907 armKSNullBreakpointState.breakpoint[i].cr = readBcrCp(i) & ~DBGBCR_ENABLE;
910 armKSNullBreakpointState.watchpoint[i].cr = readWcrCp(i) & ~DBGWCR_ENABLE;
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| /seL4-refos-master/libs/libutils/include/utils/ |
| H A D | sglib.h | 1448 type *t, *tl, *a, *b, *c, *ar, *bl, *br, *cl, *cr;\
1475 cl=c->leftt; cr=c->rightt;\
1477 a->leftt = cr;\
1489 type *t, *a, *b, *c, *d, *ar, *bl, *br, *cl, *cr, *dl, *dr;\
1513 cr = c->rightt;\
1514 if ((cl==NULL||SGLIB___GET_VALUE(cl->bits)==BLACK) && (cr==NULL||SGLIB___GET_VALUE(cr->bits)==BLACK)) {\
1522 if (cr!=NULL && SGLIB___GET_VALUE(cr->bits)==RED) {\
1523 d = cr;\
[all...] |
| /seL4-refos-master/projects/util_libs/libutils/include/utils/ |
| H A D | sglib.h | 1448 type *t, *tl, *a, *b, *c, *ar, *bl, *br, *cl, *cr;\
1475 cl=c->leftt; cr=c->rightt;\
1477 a->leftt = cr;\
1489 type *t, *a, *b, *c, *d, *ar, *bl, *br, *cl, *cr, *dl, *dr;\
1513 cr = c->rightt;\
1514 if ((cl==NULL||SGLIB___GET_VALUE(cl->bits)==BLACK) && (cr==NULL||SGLIB___GET_VALUE(cr->bits)==BLACK)) {\
1522 if (cr!=NULL && SGLIB___GET_VALUE(cr->bits)==RED) {\
1523 d = cr;\
[all...] |
| /seL4-refos-master/projects/refos/impl/apps/nethack/src/nethack-3.4.3/win/tty/ |
| H A D | wintty.c | 1931 char *cr;
1956 if ((cr = index(buf, '\n')) != 0) *cr = 0;
1958 if ((cr = index(buf, '\r')) != 0) *cr = 0;
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| /seL4-refos-master/apps/nethack/src/nethack-3.4.3/win/tty/ |
| H A D | wintty.c | 1931 char *cr;
1956 if ((cr = index(buf, '\n')) != 0) *cr = 0;
1958 if ((cr = index(buf, '\r')) != 0) *cr = 0;
|