/seL4-refos-master/projects/util_libs/libpci/include/pci/ |
H A D | pci_config.h | 88 static inline uint64_t libpci_device_iocfg_get_baseaddr(libpci_device_iocfg_t *cfg, int index) { argument 89 assert(cfg && index >= 0 && index < 6); 90 if (cfg->base_addr_type[index] != PCI_BASE_ADDRESS_MEM_TYPE_64) 91 return (uint64_t) cfg->base_addr[index]; 95 assert(cfg->base_addr_64H[index + 1]); 96 return ((uint64_t) cfg->base_addr[index]) | (((uint64_t) cfg->base_addr[index + 1]) << 32); 101 static inline uint32_t libpci_device_iocfg_get_baseaddr32(libpci_device_iocfg_t *cfg, int index) { argument 102 uint64_t baddr = libpci_device_iocfg_get_baseaddr(cfg, index); 114 static inline bool libpci_device_iocfg_uses_iomem(libpci_device_iocfg_t *cfg) { argument 124 libpci_device_iocfg_debug_print(libpci_device_iocfg_t *cfg, bool compact) argument [all...] |
H A D | pci.h | 41 libpci_device_iocfg_t cfg; member in struct:libpci_device 68 void libpci_read_ioconfig(libpci_device_iocfg_t *cfg, uint8_t bus, uint8_t dev, uint8_t fun);
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/seL4-refos-master/projects/util_libs/libplatsupport/src/mach/exynos/ |
H A D | mux.c | 58 volatile struct mux_cfg *cfg = (volatile struct mux_cfg *)_cfg; local 60 v = cfg->con; 63 ZF_LOGD("con.%d @ 0x%08x : 0x%08x->0x%08x\n", pin, (uint32_t)&cfg->con, cfg->con, v); 64 cfg->con = v; 65 cfg->conpdn |= 0x3 << BITFIELD_SHIFT(pin, 2); 70 volatile struct mux_cfg *cfg = (volatile struct mux_cfg *)_cfg; local 72 v = cfg->dat; 77 ZF_LOGD("dat.%d @ 0x%08x : 0x%08x->0x%08x\n", pin, (uint32_t)&cfg->dat, cfg 83 volatile struct mux_cfg *cfg = (volatile struct mux_cfg *)_cfg; local 90 exynos_mux_set_pud(struct mux_cfg *cfg, int pin, int pud) argument 103 volatile struct mux_cfg *cfg = (volatile struct mux_cfg *)_cfg; local 135 exynos_mux_configure(struct mux_cfg *cfg, int pin, int con, int pud, int drv) argument 153 struct mux_cfg *cfg; local 398 struct mux_cfg *cfg; local 428 struct mux_cfg *cfg; local 440 struct mux_cfg *cfg; local [all...] |
H A D | pmic.c | 125 const struct max77_config* cfg = pmic_get_priv(pmic); local 126 assert(cfg); 127 return cfg->nldo; 136 const struct max77_config* cfg; local 138 cfg = pmic_get_priv(pmic); 139 assert(cfg); 160 if (pmic_reg_write(pmic, cfg->ctrl1_start + ldo - 1, &v, 1)) { 174 const struct max77_config* cfg; local 176 cfg = pmic_get_priv(pmic); 177 assert(cfg); [all...] |
/seL4-refos-master/libs/libplatsupport/src/mach/exynos/ |
H A D | mux.c | 58 volatile struct mux_cfg *cfg = (volatile struct mux_cfg *)_cfg; local 60 v = cfg->con; 63 ZF_LOGD("con.%d @ 0x%08x : 0x%08x->0x%08x\n", pin, (uint32_t)&cfg->con, cfg->con, v); 64 cfg->con = v; 65 cfg->conpdn |= 0x3 << BITFIELD_SHIFT(pin, 2); 70 volatile struct mux_cfg *cfg = (volatile struct mux_cfg *)_cfg; local 72 v = cfg->dat; 77 ZF_LOGD("dat.%d @ 0x%08x : 0x%08x->0x%08x\n", pin, (uint32_t)&cfg->dat, cfg 83 volatile struct mux_cfg *cfg = (volatile struct mux_cfg *)_cfg; local 90 exynos_mux_set_pud(struct mux_cfg *cfg, int pin, int pud) argument 103 volatile struct mux_cfg *cfg = (volatile struct mux_cfg *)_cfg; local 135 exynos_mux_configure(struct mux_cfg *cfg, int pin, int con, int pud, int drv) argument 153 struct mux_cfg *cfg; local 398 struct mux_cfg *cfg; local 428 struct mux_cfg *cfg; local 440 struct mux_cfg *cfg; local [all...] |
H A D | pmic.c | 125 const struct max77_config* cfg = pmic_get_priv(pmic); local 126 assert(cfg); 127 return cfg->nldo; 136 const struct max77_config* cfg; local 138 cfg = pmic_get_priv(pmic); 139 assert(cfg); 160 if (pmic_reg_write(pmic, cfg->ctrl1_start + ldo - 1, &v, 1)) { 174 const struct max77_config* cfg; local 176 cfg = pmic_get_priv(pmic); 177 assert(cfg); [all...] |
/seL4-refos-master/projects/util_libs/libpci/src/ |
H A D | pci.c | 107 libpci_read_ioconfig(&libpci_device_list[libpci_num_devices].cfg, bus, dev, fun); 110 libpci_device_iocfg_debug_print(&libpci_device_list[libpci_num_devices].cfg, false); 120 libpci_device_iocfg_debug_print(&libpci_device_list[libpci_num_devices].cfg, true); 178 void libpci_read_ioconfig(libpci_device_iocfg_t *cfg, uint8_t bus, uint8_t dev, uint8_t fun) { argument 179 assert(cfg); 180 memset(cfg, 0, sizeof(libpci_device_iocfg_t)); 185 cfg->base_addr_raw[i] = bios_base_addr; 187 if (cfg->base_addr_64H[i]) { 189 cfg->base_addr[i] = cfg [all...] |
H A D | virtual_device.c | 96 assert(dev->cfg.base_addr_space[base_addr_index] == PCI_BASE_ADDRESS_SPACE_MEMORY); 98 if (dev->cfg.base_addr_64H[base_addr_index]) { 105 dev->cfg.base_addr_size_mask[base_addr_index] & PCI_BASE_ADDRESS_MEM_MASK, 106 dev->cfg.base_addr_prefetchable[base_addr_index], 107 dev->cfg.base_addr_type[base_addr_index] == PCI_BASE_ADDRESS_MEM_TYPE_64); 117 assert(dev->cfg.base_addr_space[base_addr_index] == PCI_BASE_ADDRESS_SPACE_IO); 120 dev->cfg.base_addr_size_mask[base_addr_index] & PCI_BASE_ADDRESS_IO_MASK);
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/seL4-refos-master/libs/librefos/src/refos-util/ |
H A D | device_irq.c | 51 irqState->cfg = config; 68 assert(irqState->cfg.getIRQHandlerEndpoint); 69 irqState->handler[irq].handler = irqState->cfg.getIRQHandlerEndpoint( 70 irqState->cfg.getIRQHandlerEndpointCookie, irq 79 uint32_t nextChannel = irqState->cfg.badgeBaseBit + irqState->nextIRQChannel; 81 irqState->nextIRQChannel = (irqState->nextIRQChannel + 1) % irqState->cfg.numIRQChannels; 84 assert(irqState->cfg.notifyAsyncEP); 85 seL4_CPtr irqBadge = srv_mint((1 << nextChannel) | irqState->cfg.badgeMaskBits, 86 irqState->cfg.notifyAsyncEP); 113 if ((m->badge & irqState->cfg [all...] |
/seL4-refos-master/projects/refos/impl/libs/librefos/src/refos-util/ |
H A D | device_irq.c | 51 irqState->cfg = config; 68 assert(irqState->cfg.getIRQHandlerEndpoint); 69 irqState->handler[irq].handler = irqState->cfg.getIRQHandlerEndpoint( 70 irqState->cfg.getIRQHandlerEndpointCookie, irq 79 uint32_t nextChannel = irqState->cfg.badgeBaseBit + irqState->nextIRQChannel; 81 irqState->nextIRQChannel = (irqState->nextIRQChannel + 1) % irqState->cfg.numIRQChannels; 84 assert(irqState->cfg.notifyAsyncEP); 85 seL4_CPtr irqBadge = srv_mint((1 << nextChannel) | irqState->cfg.badgeMaskBits, 86 irqState->cfg.notifyAsyncEP); 113 if ((m->badge & irqState->cfg [all...] |
/seL4-refos-master/projects/refos/impl/apps/file_server/src/ |
H A D | state.c | 43 srv_common_config_t cfg = { local 56 srv_common_init(fileServCommon, cfg);
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/seL4-refos-master/apps/file_server/src/ |
H A D | state.c | 43 srv_common_config_t cfg = { local 56 srv_common_init(fileServCommon, cfg);
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/seL4-refos-master/libs/libplatsupport/arch_include/arm/platsupport/ |
H A D | spi.h | 47 typedef void (*spi_chipselect_fn)(const spi_slave_config_t* cfg, int state); 80 * @param[in] cfg Slave configuration 82 void spi_prepare_transfer(spi_bus_t* spi_bus, const spi_slave_config_t* cfg);
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/seL4-refos-master/projects/util_libs/libplatsupport/arch_include/arm/platsupport/ |
H A D | spi.h | 47 typedef void (*spi_chipselect_fn)(const spi_slave_config_t* cfg, int state); 80 * @param[in] cfg Slave configuration 82 void spi_prepare_transfer(spi_bus_t* spi_bus, const spi_slave_config_t* cfg);
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/seL4-refos-master/kernel/src/drivers/timer/ |
H A D | am335x-timer.c | 102 SET_REGISTER(timer->cfg, TIOCP_CFG_SOFTRESET); 108 for (timeout = 10000; (timer->cfg & TIOCP_CFG_SOFTRESET) && timeout > 0; timeout--); 141 timer->cfg = TIOCP_CFG_SOFTRESET; 143 for (timeout = 10000; (timer->cfg & TIOCP_CFG_SOFTRESET) && timeout > 0; timeout--)
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H A D | omap3430-timer.c | 34 timer->cfg = TIOCP_CFG_SOFTRESET; 61 timer->cfg = TIOCP_CFG_SOFTRESET;
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/seL4-refos-master/projects/refos/impl/apps/timer_server/src/ |
H A D | state.c | 49 srv_common_config_t cfg = { local 63 srv_common_init(timeServCommon, cfg);
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/seL4-refos-master/apps/timer_server/src/ |
H A D | state.c | 49 srv_common_config_t cfg = { local 63 srv_common_init(timeServCommon, cfg);
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/seL4-refos-master/kernel/tools/ |
H A D | hardware_gen.py | 49 cfg = config.get_arch_config(args.arch, args.addrspace_max) 54 hardware = HardwareYaml(rules, cfg) 59 OUTPUTS[t].run(parsed_dt, hardware, cfg, args)
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/seL4-refos-master/libs/libplatsupport/src/plat/zynq7000/ |
H A D | devcfg.h | 31 uint32_t cfg; // 0x0008 Configuration member in struct:devcfg_regs
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/seL4-refos-master/projects/util_libs/libplatsupport/src/plat/zynq7000/ |
H A D | devcfg.h | 31 uint32_t cfg; // 0x0008 Configuration member in struct:devcfg_regs
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/seL4-refos-master/libs/libplatsupport/src/plat/am335x/ |
H A D | timer.c | 45 dmt->hw->cfg = TIOCP_CFG_SOFTRESET; 46 while (dmt->hw->cfg & TIOCP_CFG_SOFTRESET); 114 dmt->hw->cfg = TIOCP_CFG_SOFTRESET; 115 while (dmt->hw->cfg & TIOCP_CFG_SOFTRESET);
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/seL4-refos-master/projects/util_libs/libplatsupport/src/plat/am335x/ |
H A D | timer.c | 45 dmt->hw->cfg = TIOCP_CFG_SOFTRESET; 46 while (dmt->hw->cfg & TIOCP_CFG_SOFTRESET); 114 dmt->hw->cfg = TIOCP_CFG_SOFTRESET; 115 while (dmt->hw->cfg & TIOCP_CFG_SOFTRESET);
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/seL4-refos-master/projects/refos/impl/apps/console_server/src/ |
H A D | state.c | 90 srv_common_config_t cfg = { local 103 srv_common_init(conServCommon, cfg);
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/seL4-refos-master/apps/console_server/src/ |
H A D | state.c | 90 srv_common_config_t cfg = { local 103 srv_common_init(conServCommon, cfg);
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