/seL4-l4v-master/seL4/src/arch/x86/32/ |
H A D | head.S | 21 movl %cr4, %eax 22 orl $0x10, %eax 23 movl %eax, %cr4 26 leal _boot_pd, %eax 27 movl %eax, %cr3 31 movl %cr0, %eax 32 andl $0x9fffffff, %eax 33 orl $0x80000000, %eax 34 movl %eax, %cr0 39 movl %cr4, %eax [all...] |
H A D | machine_asm.S | 29 movl 4(%esp), %eax 30 lgdt (%eax) # load gdtr register with gdt pointer 45 movl 4(%esp), %eax 46 lidt (%eax) 62 movl $1, %eax 64 movl %ebx, %eax 65 shrl $8, %eax 66 andl $0xff, %eax 67 shll $3, %eax 89 movl 8(%esp), %eax [all...] |
H A D | traps.S | 34 pushl %eax; \ 369 pushl %eax 397 popl %eax 426 movl (4 * FLAGS)(%esp), %eax 428 testl %ebx, %eax 440 andl $~(1<<8), %eax 441 movl %eax, (4 * FLAGS)(%esp) 448 popl %eax 463 movl (4 * Error)(%esp), %eax # EAX contains Error Code 480 pushl %eax [all...] |
/seL4-l4v-master/HOL4/examples/l3-machine-code/x64/decompiler/ |
H A D | x64_decomp_demoScript.sml | 13 (* 14: *) 8B45F8 (* mov -0x8(%rbp),%eax *) 14 (* 17: *) 4863D0 (* movslq %eax,%rdx *) 17 (* 21: *) 0FB600 (* movzbl (%rax),%eax *) 18 (* 24: *) 0FBEC0 (* movsbl %al,%eax *) 19 (* 27: *) 8945FC (* mov %eax,-0x4(%rbp) *) 24 (* 36: *) 8B45F8 (* mov -0x8(%rbp),%eax *) 25 (* 39: *) 4863D0 (* movslq %eax,%rdx *) 28 (* 43: *) 8B45FC (* mov -0x4(%rbp),%eax *) 29 (* 46: *) 83E820 (* sub $0x20,%eax *) 32 (* 4f: *) 8B45F8 (* mov -0x8(%rbp),%eax *) [all...] |
/seL4-l4v-master/seL4/src/arch/x86/64/ |
H A D | head.S | 54 movl $0x80000001, %eax 75 movl %cr0, %eax 76 andl $0x7fffffff, %eax 77 movl %eax, %cr0 126 movl $0x1, %eax 144 movl $0x7, %eax 162 movl $0x80000001, %eax 181 movl $0x7, %eax 186 movl %cr4, %eax 188 orl $0x10000, %eax [all...] |
H A D | machine_asm.S | 38 outl %eax, %dx 59 inl %dx, %eax 65 movl $1, %eax 67 movl %ebx, %eax 68 shrl $8, %eax 69 andl $0xff, %eax 70 shll $3, %eax
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/seL4-l4v-master/seL4/libsel4/sel4_arch_include/ia32/sel4/sel4_arch/ |
H A D | types.h | 21 seL4_Word eip, esp, eflags, eax, ebx, ecx, edx, esi, edi, ebp; member in struct:seL4_UserContext_
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H A D | deprecated.h | 51 seL4_Word eax; member in struct:__anon217::__anon218
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/seL4-l4v-master/seL4/src/arch/x86/machine/ |
H A D | cpu_identification.c | 120 cpuid_001h_eax_t eax; local 128 /* Need both eax and ebx ouput values. */ 129 eax.words[0] = x86_cpuid_eax(1, 0); 135 original.family = cpuid_001h_eax_get_family(eax); 136 original.model = cpuid_001h_eax_get_model(eax); 137 ci->display.stepping = cpuid_001h_eax_get_stepping(eax); 140 ci->display.extended_family = cpuid_001h_eax_get_extended_family(eax); 141 ci->display.extended_model = cpuid_001h_eax_get_extended_model(eax);
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/seL4-l4v-master/HOL4/polyml/libpolyml/ |
H A D | x86assembly_gas32.S | 29 %%eax: First argument to function. Result of function call. 116 movl Arg_SaveRAX(%ebp),%eax # Load the registers 129 movl %eax,Arg_SaveRAX(%ebp) 144 movl Arg_ExceptionPacket(%ebp),%eax 145 cmpl $1,%eax # Did we raise an exception? 148 movl Arg_SaveRAX(%ebp),%eax # Load the registers 175 movl 4(%esp),%eax 177 movl %edi,%eax # On X86_64 the argument is passed in %edi 179 # Use %ecx and %eax because they are volatile (unlike %ebx on X86/64/Unix) 181 lock; xaddl %ecx,(%eax) [all...] |
H A D | x86assembly_masm32.S | 23 ; eax: First argument to function. Result of function call. 94 mov eax,[ArgVector.SaveRAX+ebp] 108 mov [ArgVector.SaveRAX+ebp],eax 124 mov eax,[ArgVector.ExceptionPacket+ebp] 125 cmp eax,1 ; Did we raise an exception? 128 mov eax,[ArgVector.SaveRAX+ebp] 152 mov eax,4[esp] 153 ; Use ecx and eax because they are volatile (unlike ebx on X86/64/Unix) 155 lock xadd [eax],ecx 157 mov eax,ec [all...] |
/seL4-l4v-master/seL4/include/arch/x86/arch/ |
H A D | machine.h | 134 static inline uint32_t x86_cpuid_edx(uint32_t eax, uint32_t ecx) argument 138 : "=a"(eax), 142 : "a"(eax), "c"(ecx) 147 static inline uint32_t x86_cpuid_eax(uint32_t eax, uint32_t ecx) argument 151 : "=a"(eax), 155 : "a"(eax), "c"(ecx) 157 return eax; 160 static inline uint32_t x86_cpuid_ecx(uint32_t eax, uint32_t ecx) argument 164 : "=a"(eax), 168 : "a"(eax), " 173 x86_cpuid_ebx(uint32_t eax, uint32_t ecx) argument [all...] |
/seL4-l4v-master/seL4/libsel4/arch_include/x86/sel4/arch/ |
H A D | types.h | 40 seL4_Word eax, ebx, ecx, edx, esi, edi, ebp; member in struct:seL4_VCPUContext_
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/seL4-l4v-master/HOL4/examples/machine-code/compiler/ |
H A D | codegenLib.sml | 217 L: add eax,ebx 221 G: xor eax, 5`; 227 xor eax, 5000 228 xor eax, 5000 229 xor eax, 5000 230 xor eax, 5000 231 xor eax, 5000 232 xor eax, 5000 233 xor eax, 5000 234 xor eax, 500 [all...] |
H A D | codegen_x86Lib.sml | 8 val x86_regs = ref [(0,"eax"), (1,"ecx"), (2,"edx"), (3,"ebx"), 39 val (i_reg,j_reg) = if i_reg = "eax" then (i_reg,j_reg) else (j_reg,i_reg) 40 in if (i_reg = "eax") andalso (k_reg = "eax") then ["mul " ^ x86_reg j] 48 val (i_reg,j_reg) = if i_reg = "eax" then (i_reg,j_reg) else (j_reg,i_reg) 49 in if (i_reg = "eax") andalso (k_reg = "eax") then ["xor edx, edx", "div " ^ x86_reg j] 57 val (i_reg,j_reg) = if i_reg = "eax" then (i_reg,j_reg) else (j_reg,i_reg) 58 in if (i_reg = "eax") andalso (k_reg = "edx") then ["xor edx, edx", "mod " ^ x86_reg j]
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/seL4-l4v-master/HOL4/examples/machine-code/instruction-set-models/x86/ |
H A D | x86_Lib.sml | 164 val th = x86_step (x86_encode "dec eax") 168 val th = x86_step (x86_encode "mov BYTE [eax],-100") 171 val th = x86_step (x86_encode "xchg [ebx],eax") 174 val th = x86_step "0538000000"; (* add eax,56 *) 176 val th = x86_step "810037020000"; (* add dword [eax],567 *) 179 val th = x86_step "2538000000"; (* and eax,56 *) 180 val th = x86_step "812037020000"; (* and dword [eax],567 *) 207 val th = x86_step "FF80401F0000"; (* inc dword [eax+8000] *) 208 val th = x86_step "40"; (* inc eax *) 209 val th = x86_step "F750C8"; (* not dword [eax [all...] |
H A D | x86_decoderScript.sml | 492 val th = EVAL ``x86_decode(bytebits "8D84B6EE711202")``; (* lea eax, [esi + 4*esi + 34763246] *) 497 val th = EVAL ``x86_decode(bytebits "D1F8")``; (* sar eax, 1 *) 498 val th = EVAL ``x86_decode(bytebits "C1F808")``; (* sar eax, 8 *) 499 val th = EVAL ``x86_decode(bytebits "0538000000")``; (* add eax,56 *) 500 val th = EVAL ``x86_decode(bytebits "810037020000")``; (* add dword [eax],567 *) 503 val th = EVAL ``x86_decode(bytebits "2538000000")``; (* and eax,56 *) 504 val th = EVAL ``x86_decode(bytebits "812037020000")``; (* and dword [eax],567 *) 507 val th = EVAL ``x86_decode(bytebits "0F44C1")``; (* cmove eax, ecx *) 508 val th = EVAL ``x86_decode(bytebits "0F454104")``; (* cmovne eax, [ecx+4] *) 531 val th = EVAL ``x86_decode(bytebits "0FB110")``; (* cmpxchg [eax],ed [all...] |
H A D | x86_Script.sml | 55 val th = EVAL ``x86_decode(bytebits "D1F8")``; (* sar eax, 1 *)
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/seL4-l4v-master/HOL4/examples/machine-code/decompiler/demo/ |
H A D | decompiler_demoScript.sml | 64 31C0 (* xor eax, eax *) 67 40 (* inc eax *)
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/seL4-l4v-master/HOL4/examples/machine-code/lisp/ |
H A D | divideScript.sml | 12 [(3,"eax"),(4,"ecx"),(5,"edx"),(6,"ebx"),(7,"edi"),(8,"esi"),(10,"ebp")] 235 ``((let (eax,ecx,edx) = x86_div_mod (eax,ecx) in pp eax ecx edx) = 236 (let (eax,edx) = (word_div eax ecx, word_mod eax ecx) in pp eax ecx edx))``, 240 val imp = Q.SPECL [`ecx`,`eax`] arm_div_thm 243 ``ecx <> 0x0w ==> x86_div_mod_pre (eax,ec [all...] |
/seL4-l4v-master/HOL4/examples/machine-code/just-in-time/ |
H A D | jit_basicScript.sml | 25 val ((th1,_,_),_) = spec (x86_encode "mov eax,[ebp]") 61 val ((th1,_,_),_) = spec (x86_encode "mov [edi-4],eax") 71 val th = Q.INST [`eax`|->`x`] th
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/seL4-l4v-master/HOL4/polyml/mlsource/MLCompiler/CodeTree/X86Code/ |
H A D | X86FOREIGNCALL.sml | 61 Our ML conventions use eax, ebx for the first two arguments in X86/32, 225 (* The stack arguments have to be copied first followed by the ebx and finally eax. *) 227 | pushArgs (_, [argType]) = pushReg(eax, argType) 228 | pushArgs (_, [arg2Type, arg1Type]) = pushReg(ebx, arg2Type) @ pushReg(eax, arg1Type) 244 | pushArgs 1 = [moveRR{source=eax, output=edi, opSize=polyWordOpSize}] 265 | [FastArgFixed] => [ moveRR{source=eax, output=edi, opSize=polyWordOpSize} ] 268 [ moveRR{source=mlArg2Reg, output=esi, opSize=polyWordOpSize}, moveRR{source=eax, output=edi, opSize=polyWordOpSize} ] 270 [ moveRR{source=mlArg2Reg, output=esi, opSize=polyWordOpSize}, moveRR{source=eax, output=edi, opSize=polyWordOpSize}, 273 [ moveRR{source=mlArg2Reg, output=esi, opSize=polyWordOpSize}, moveRR{source=eax, output=edi, opSize=polyWordOpSize}, 279 | [FastArgDouble, FastArgFixed] => [ moveRR{source=eax, outpu [all...] |
/seL4-l4v-master/HOL4/examples/l3-machine-code/x64/model/ |
H A D | x64AssemblerLib.sml | 273 add eax, 127 274 add eax, 255 275 add eax, 256
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/seL4-l4v-master/HOL4/examples/machine-code/instruction-set-models/x86_64/ |
H A D | x64_Lib.sml | 177 val th = x64_step (x64_encode "dec eax") 193 val th = x64_step (x64_encode "SBB eax,[rax]"); 196 val th = x64_step (x64_encode "TEST eax,3"); 198 val th = x64_step (x64_encode "SHL eax,1"); 202 val th = x64_step (x64_encode "CMOVNE eax, [rsi]");
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H A D | x64_opsemScript.sml | 333 (\ ((ea_src,val_src),(eax,nothing)). 334 parT_unit (write_reg ii RAX (eax * val_src)) 335 (parT_unit (write_reg ii RDX (n2w ((w2n eax * w2n val_src) DIV value_width s))) 341 (\ (eax,edx). constT (w2n edx * value_width s + w2n eax))))
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