History log of /seL4-l4v-master/seL4/src/arch/x86/64/head.S
Revision Date Author Comments
# 6bb71d68 21-Jun-2020 Yanyan Shen <yshen@cog.systems>

x64: Fix Github issue #174

The PCID feature is the 17th bit in ECX when CPUID is called with
EAX=1. The constant for testing the feature should be 0x20000.

Signed-off-by: Yanyan Shen <yshen@cog.systems>


# 79da0792 01-Mar-2020 Gerwin Klein <gerwin.klein@data61.csiro.au>

Convert license tags to SPDX identifiers

This commit also converts our own copyright headers to directly use
SPDX, but leaves all other copyright header intact, only adding the
SPDX ident. As far as possible this commit also merges multiple
Data61 copyright statements/headers into one for consistency.


# 3751da4e 06-Dec-2018 Jasper Lowell <jasper.lowell@data61.csiro.au>

x86_64: Update boot code documentation


# 96479f85 06-Dec-2018 Jasper Lowell <jasper.lowell@data61.csiro.au>

x86_64: Add modular error handling (asm)

Adding a function to hang the system when necessary system conditions
are not met.


# 3caffbb1 06-Dec-2018 Jasper Lowell <jasper.lowell@data61.csiro.au>

x86_64: Reduce scope of preprocessor condition

The fsgsbase_enable function can be completely removed when not
configured.


# aac08637 03-Dec-2018 Jasper Lowell <jasper.lowell@data61.csiro.au>

x86_64: Rework boot code to always use small pages

Previously, there was a check for whether or not huge pages are
supported by the processor before proceeding to set up the temporary
boot page table structures with the corresponding page size.

This is unnecessary as the page table structures are destroyed and
redefined again before entering user space.

The check for CONFIG_HUGE_PAGE is retained but not used for determining
the size of the boot page table structures. Instead, small pages are
always used as this is always supported by the architecture. This is a
beneficial change as it reduces the size and complexity of the untrusted
assembly boot code.

This change has the consequence of encouraging TLB misses during the
boot process but considering the size of the kernel and the lack of
running user space processes this is negligible.


# 4008fd6b 02-Dec-2018 Jasper Lowell <jasper.lowell@data61.csiro.au>

x86_64: Fix incorrect assembly annotation


# b942a504 26-Mar-2018 Bruce Mitchener <bruce.mitchener@gmail.com>

Fix trivial comment typos.


# ee28936d 18-Jun-2017 Hesham Almatary <hesham.almatary@data61.csiro.au>

SMP: Introduce ENABLE_SMP_SUPPORT

- Make it more readable and less confusing compared to the 'CONFIG_MAX_NUM_NODES > 1' check


# 40c61e5c 18-Jun-2017 Anna Lyons <Anna.Lyons@data61.csiro.au>

Fix licenses (the rest)


# c5483385 12-Feb-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Remove duplication of the multiboot header


# 5037717c 11-Jan-2017 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Explicitly define kernel stack size

This commit changes the previous hard coded 4K kernel stack size
to being a configurable power of 2 sized stack


# 62bb8ee1 11-Dec-2016 Jeff Waugh <jdub@bethesignal.org>

Enable SYSCALL (SCE) after entering long mode

It appears to be somewhat more correct to flip SCE after entering
long mode, as per other operating systems (including Linux).


# 3ba3f2de 04-Dec-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

x86: Add BSS regions for BOOT and PHYS code

Uninitialized data structures in BOOT and PHYS code currently get
placed in sections that are allocated in the file of the final image.
Whilst these sections will get reclaimed during kernel boot, so no
runtime memory is being wasted, it results in kernel images that
are much larger to load and transport than necesary.

This change adds explicit BSS regions for both BOOT and PHYS code
and moves all appropriate data structures into them


# 25282731 09-Nov-2016 Adrian Danis <Adrian.Danis@data61.csiro.au>

x64: Add entry point for AP


# 7f9970e5 20-Dec-2015 Adrian Danis <Adrian.Danis@nicta.com.au>

x64: Add x86_64 support