Searched refs:ldr (Results 1 - 25 of 42) sorted by relevance

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/seL4-l4v-10.1.1/HOL4/polyml/libpolyml/libffi/src/arm/
H A Dtrampoline.S39 ldr r0, [pc, #-4092]
42 ldr pc, [pc, #-4092]
52 ldr r0, [pc, #-4092]
55 ldr pc, [pc, #-4092]
65 ldr r0, [pc, #-4092]
68 ldr pc, [pc, #-4092]
78 ldr r0, [pc, #-4092]
81 ldr pc, [pc, #-4092]
91 ldr r0, [pc, #-4092]
94 ldr p
[all...]
H A Dgentramp.sh41 # are unreachable due to our maximum pc-relative ldr offset.
98 ldr r0, [pc, #-4092]
101 ldr pc, [pc, #-4092]
H A Dsysv.S138 ldr\cond lr, [sp], #4
145 ldr\cond pc, [sp], #4
182 ldr ip, [fp] @ load fn() in advance
194 ldr r2, [sp, #24]
197 ldr r3, [sp, #12]
295 ldr r0, [sp]
298 ldr r0, [sp]
299 ldr r1, [sp, #4]
371 ldr ip, [fp] @ load fn() in advance
384 ldr r
[all...]
/seL4-l4v-10.1.1/seL4/src/arch/arm/32/
H A Dtraps.S22 ldr pc, =arm_reset_exception
23 ldr pc, =arm_undefined_inst_exception
24 ldr pc, =arm_swi_syscall
25 ldr pc, =arm_prefetch_abort_exception
26 ldr pc, =arm_data_abort_exception
27 ldr pc, =arm_reset_exception
28 ldr pc, =arm_irq_exception
29 ldr pc, =arm_fiq_exception
52 ldr r8, [sp]
56 ldr s
[all...]
H A Dhead.S84 ldr r5, =CPSR_KERNEL
93 ldr r5, =CR_BITS_SET
94 ldr r6, =CR_BITS_CLEAR
101 ldr r4, =PPTR_VECTOR_TABLE
111 ldr r5, =BIT(2)
119 ldr r6, =PREFETCHER_MASK
121 ldr r6, =PREFETCHER
130 ldr sp, =kernel_stack_alloc + BIT(CONFIG_KERNEL_STACK_BITS)
141 ldr r5, =BIT(CONFIG_KERNEL_STACK_BITS)
155 ldr s
[all...]
H A Dhyp_traps.S68 ldr pc, =arm_hyp_reset_exception
69 ldr pc, =arm_hyp_undefined_inst_exception
70 ldr pc, =arm_hyp_syscall
71 ldr pc, =arm_hyp_prefetch_abort_exception
72 ldr pc, =arm_hyp_data_abort_exception
73 ldr pc, =arm_hyp_trap
74 ldr pc, =arm_hyp_irq_exception
75 ldr pc, =arm_hyp_fiq_exception
/seL4-l4v-10.1.1/HOL4/examples/l3-machine-code/arm/prog/
H A Darm_tests.sml3179 "e592b008" (* ldr fp, [r2, #8] *) ::
3180 "e593b00c" (* ldr fp, [r3, #12] *) ::
3181 "e593b010" (* ldr fp, [r3, #16] *) ::
3182 "e593b008" (* ldr fp, [r3, #8] *) ::
3183 "e793b107" (* ldr fp, [r3, r7, lsl #2] *) ::
3184 "e59db094" (* ldr fp, [sp, #148] *) ::
3185 "e59db02c" (* ldr fp, [sp, #44] *) ::
3186 "e59db034" (* ldr fp, [sp, #52] *) ::
3187 "e59db03c" (* ldr fp, [sp, #60] *) ::
3188 "e59db044" (* ldr f
[all...]
/seL4-l4v-10.1.1/seL4/src/arch/arm/64/
H A Dhead.S81 ldr x19, =CR_BITS_SET
82 ldr x20, =CR_BITS_CLEAR
91 ldr x5, =BIT(CONFIG_KERNEL_STACK_BITS)
93 ldr x4, =kernel_stack_alloc + BIT(CONFIG_KERNEL_STACK_BITS)
105 ldr x4, =kernel_stack_alloc + BIT(CONFIG_KERNEL_STACK_BITS)
/seL4-l4v-10.1.1/seL4/src/arch/x86/kernel/
H A Dxapic.c25 uint32_t ldr; local
28 ldr = apic_read_reg(APIC_LOGICAL_DEST) & MASK(XAPIC_LDR_SHIFT);
29 ldr |= (BIT(getCurrentCPUIndex()) << XAPIC_LDR_SHIFT);
30 apic_write_reg(APIC_LOGICAL_DEST, ldr);
/seL4-l4v-10.1.1/seL4/src/arch/arm/armv/armv6/
H A Dmachine_asm.S32 ldr r2, [r0]
/seL4-l4v-10.1.1/HOL4/examples/l3-machine-code/arm/decompiler/
H A Darm_decomp_demoScript.sml21 e59d3000 (* ldr r3, [sp] *)
146 e59f322c 00012f94 (* ldr r3, [pc, #556] ; 824c *)
147 e59f222c 00012f80 (* ldr r2, [pc, #556] ; 8250 *)
150 e59f3224 00012e84 (* ldr r3, [pc, #548] ; 8254 *)
151 e59f2224 00012f98 (* ldr r2, [pc, #548] ; 8258 *)
164 e59f11f4 00012f86 (* ldr r1, [pc, #500] ; 825c *)
165 e59f01f4 00012f8c (* ldr r0, [pc, #500] ; 8260 *)
184 e59f01a4 00012f86 (* ldr r0, [pc, #420] ; 825c *)
206 e59f3154 00012f84 (* ldr r3, [pc, #340] ; 8264 *)
212 e59f2134 00012f86 (* ldr r
[all...]
H A Darm_decompLib.sml99 ldr r2, [r0, #4] ; load data
/seL4-l4v-10.1.1/HOL4/examples/ARM/v7/
H A Dselftest.sml181 [("ldr pc,[pc,r2,lsl #2]",
501 ldr pc,[r2,#-5]
503 // ldr pc,[pc,r1]
504 ldr pc,[r1,-r2]!
505 ldr r2,[pc,-r3]
506 ldr r2,[r3],#-5
507 ldr pc,[r3],#-5
508 ldr pc,[r1],r2
516 ldr pc,[r2,#-5]
517 ldr p
[all...]
/seL4-l4v-10.1.1/HOL4/examples/l3-machine-code/m0/decompiler/
H A Dm0_decomp_demoScript.sml11 l1: ldr r2, [r0, #4] ; load data
H A Dm0_core_decompLib.sml230 6842 (* l1: ldr r2, [r0, #4] *)
240 l1: ldr r2, [r0, #4] ; load data
/seL4-l4v-10.1.1/HOL4/examples/ARM/arm6-verification/correctness/
H A Diclass_compScript.sml23 val classes = [`unexec`,`swp`,`mrs_msr`,`data_proc`,`reg_shift`,`ldr`,`str`,
69 [`swp`,`mrs_msr`,`data_proc`,`reg_shift`,`ldr`,`str`,
H A Diclass_compLib.sml73 val classes = [`unexec`,`swp`,`mrs_msr`,`data_proc`,`reg_shift`,`ldr`,`str`,
/seL4-l4v-10.1.1/HOL4/polyml/libpolyml/libffi/src/aarch64/
H A Dsysv.S161 ldr x8, [x21, #8*8]
281 ldr x0, [x22, #8]
291 ldr x0, [x22, #0]
300 ldr x0, [x22, #8]
/seL4-l4v-10.1.1/HOL4/examples/ARM/arm6-verification/
H A DcoreScript.sml64 (is = t4) /\ (ic = ldr) \/
94 ((is = t3) /\ ((ic = ldr) \/ (ic = str) \/ (ic = swp)) \/
99 ((ic = ldr) \/ (ic = str) \/ (ic = swp)) /\ (is = t3) \/
128 else if (is = t4) /\ ((ic = ldr) \/ (ic = str)) then
133 else if (is = t5) /\ (ic = ldr) \/
154 (ic = ldr) \/ (ic = str) \/ (ic = ldm) \/ (ic = stm) \/
173 if ((ic = ldr) \/ (ic = ldm) \/ (ic = swp) \/ (ic = mrc)) /\ (is = t4) \/
241 else if (ic = ldr) \/ (ic = str) then
248 else if (is = t5) /\ (ic = ldr) \/ (is = t6) /\ (ic = swp) then
262 (ic = ldr) \/ (i
[all...]
H A DarmLib.sml22 ``mla_mul``, ``ldr``,``str``,``ldm``,``stm``,``br``,``swi_ex``,
/seL4-l4v-10.1.1/HOL4/examples/dev/sw/working/examples/
H A Dfc_examples.sml95 6: ldr r0, [ip, #1]
102 13: ldr r1, [sp, #1]
/seL4-l4v-10.1.1/HOL4/examples/machine-code/garbage-collectors/
H A Darm_cheney_gcScript.sml26 E5957000 (* ldr r7,[r5] *)
40 E5967000 (* ldr r7,[r6] *)
52 E5935000 (* ldr r5,[r3] *)
53 E5936004 (* ldr r6,[r3,#4] *)
69 E5995000 (* ldr r5,[r9] *)
81 E519501C (* ldr r5,[r9,#-28] *)
82 E5196020 (* ldr r6,[r9,#-32] *)
92 E5994004 (* EXIT:ldr r4,[r9,#4] *)`;
100 E5197018 (* NO_GC:ldr r7,[r9,#-24] *)
101 E5198014 (* ldr r
[all...]
/seL4-l4v-10.1.1/HOL4/examples/machine-code/compiler/
H A Dcodegen_armLib.sml72 | f (ASSIGN_EXP (d, ASSIGN_EXP_STACK i)) = ["ldr? " ^ r d ^ ", " ^ s i]
76 | f (ASSIGN_EXP (d, ASSIGN_EXP_MEMORY (ACCESS_WORD,a))) = ["ldr? " ^ r d ^ ", " ^ address a]
/seL4-l4v-10.1.1/HOL4/examples/machine-code/graph/
H A Dstack_introLib.sml26 val ((th,_,_),_) = f "e59d900c" (* ldr r9, [sp, #12] *)
/seL4-l4v-10.1.1/HOL4/examples/l3-machine-code/m0/model/
H A Dm0AssemblerLib.sml289 ldr r1, +#4
290 ldr r1, +#8
291 ldr r1, +#12

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