Searched refs:PURE (Results 1 - 25 of 55) sorted by relevance

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/seL4-l4v-10.1.1/HOL4/src/simp/src/
H A DpureSimps.sml7 {name = SOME "PURE",
/seL4-l4v-10.1.1/seL4/src/arch/riscv/machine/
H A Dhardware.c22 word_t PURE
/seL4-l4v-10.1.1/seL4/include/arch/arm/arch/32/mode/
H A Dmachine_pl2.h97 static inline word_t PURE getHCPTR(void)
126 static inline paddr_t PURE addressTranslateS1CPR(vptr_t vaddr)
136 static inline word_t PURE getHSR(void)
143 static inline word_t PURE getHDFAR(void)
150 static inline word_t PURE getHIFAR(void)
157 static inline word_t PURE getHPFAR(void)
H A Dmachine.h76 word_t PURE getRestartPC(tcb_t *thread);
429 static inline word_t PURE getIFSR(void)
441 static inline word_t PURE getDFSR(void)
453 static inline word_t PURE getADFSR(void)
465 static inline word_t PURE getAIFSR(void)
477 static inline word_t PURE getDFAR(void)
489 static inline word_t PURE getIFAR(void)
525 static inline word_t PURE getFAR(void)
/seL4-l4v-10.1.1/seL4/include/api/
H A Dmacros.h30 #ifndef PURE
31 #define PURE __attribute__((__pure__)) macro
H A Dsyscall.h28 static inline word_t PURE
H A Dtypes.h60 static inline cap_transfer_t PURE
/seL4-l4v-10.1.1/seL4/libsel4/include/sel4/
H A Dmacros.h30 #ifndef PURE
31 #define PURE __attribute__((__pure__)) macro
/seL4-l4v-10.1.1/seL4/include/arch/arm/arch/32/mode/kernel/
H A Dthread.h44 static inline bool_t PURE
/seL4-l4v-10.1.1/seL4/include/object/
H A Dcnode.h45 bool_t PURE isMDBParentOf(cte_t *cte_a, cte_t *cte_b);
48 bool_t PURE isFinalCapability(cte_t *cte);
49 bool_t PURE slotCapLongRunningDelete(cte_t *slot);
51 cap_transfer_t PURE loadCapTransfer(word_t *buffer);
/seL4-l4v-10.1.1/HOL4/src/HolSat/vector_def_CNF/
H A DdefCNF.sig40 val DEF_CNF_CONV : conv (* NNF + PURE + CLEANUP *)
60 val DEF_CNF_VECTOR_CONV : conv (* NNF + PURE + CLEANUP *)
/seL4-l4v-10.1.1/seL4/include/machine/
H A Dregisterset.h33 static inline word_t PURE
/seL4-l4v-10.1.1/seL4/include/arch/x86/arch/model/
H A Dsmp.h41 static inline PURE word_t getCurrentCPUID(void)
/seL4-l4v-10.1.1/seL4/src/arch/arm/32/machine/
H A Dhardware.c16 word_t PURE
/seL4-l4v-10.1.1/seL4/src/arch/arm/64/machine/
H A Dhardware.c18 word_t PURE
/seL4-l4v-10.1.1/seL4/include/
H A Dutil.h37 #define PURE __attribute__((__pure__)) macro
94 int PURE strncmp(const char *s1, const char *s2, int n);
96 long PURE str_to_long(const char* str);
/seL4-l4v-10.1.1/seL4/include/arch/x86/arch/32/mode/object/
H A Dstructures.h87 static inline asid_t PURE
99 static inline asid_t PURE
/seL4-l4v-10.1.1/seL4/src/
H A Dutil.c82 int PURE
111 long PURE
/seL4-l4v-10.1.1/seL4/include/arch/riscv/arch/
H A Dmachine.h40 word_t PURE getRestartPC(tcb_t *thread);
/seL4-l4v-10.1.1/seL4/include/arch/arm/arch/kernel/
H A Dvspace.h40 word_t* PURE lookupIPCBuffer(bool_t isReceiver, tcb_t *thread);
/seL4-l4v-10.1.1/seL4/include/arch/arm/arch/64/mode/
H A Dmachine.h50 word_t PURE getRestartPC(tcb_t *thread);
287 static inline word_t PURE getESR(void)
298 static inline word_t PURE getFAR(void)
/seL4-l4v-10.1.1/isabelle/src/Pure/Thy/
H A Dthy_header.scala74 val PURE = "Pure"
77 val bootstrap_thys = List(PURE, ML_BOOTSTRAP).map(a => a -> ("Bootstrap_" + a))
80 (Sessions.root_name :: (ml_roots ::: bootstrap_thys).map(_._2)).map(_ -> PURE)
/seL4-l4v-10.1.1/l4v/isabelle/src/Pure/Thy/
H A Dthy_header.scala74 val PURE = "Pure"
77 val bootstrap_thys = List(PURE, ML_BOOTSTRAP).map(a => a -> ("Bootstrap_" + a))
80 (Sessions.root_name :: (ml_roots ::: bootstrap_thys).map(_._2)).map(_ -> PURE)
/seL4-l4v-10.1.1/seL4/include/arch/riscv/arch/kernel/
H A Dvspace.h55 word_t* PURE lookupIPCBuffer(bool_t isReceiver, tcb_t *thread);
/seL4-l4v-10.1.1/seL4/include/kernel/
H A Dthread.h42 static inline bool_t PURE

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