Searched refs:msiq_rec_type (Results 1 - 5 of 5) sorted by relevance
/opensolaris-onvv-gate/usr/src/uts/sun4/io/px/ |
H A D | px_ioapi.h | 481 msiq_rec_type : 8; /* DW 0 - 07:00 */ member in struct:msiq_rec 510 typedef enum msiq_rec_type { enum
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H A D | px_ib.c | 930 msiq_rec_type_t msiq_rec_type; local 947 msiq_rec_type = MSI64_REC; 950 msiq_rec_type = MSI32_REC; 997 msiq_rec_type, msi_num, cpu_id, &msiq_id)) != DDI_SUCCESS) { 1010 hdlp, msiq_rec_type, msi_num, msiq_id); 1017 PX_INTR_STATE_ENABLE, msiq_rec_type, msi_num)) != DDI_SUCCESS) { 1021 hdlp, msiq_rec_type, msi_num, msiq_id); 1043 hdlp->ih_pri), rdip, hdlp->ih_inum, msiq_rec_type, msi_num); 1047 rdip, hdlp->ih_inum, msiq_rec_type, msi_num); 1052 hdlp, msiq_rec_type, msi_nu [all...] |
H A D | px_intr.c | 313 rec_type = msiq_rec_p->msiq_rec_type; 316 "msiq_rec_type 0x%llx msiq_rec_rid 0x%llx\n", 554 msiq_rec_type_t msiq_rec_type; local 567 msiq_rec_type = MSI64_REC; 571 msiq_rec_type = MSI32_REC; 651 msiq_rec_type, msi_num, -1, &msiq_id)) != DDI_SUCCESS) { 662 hdlp, msiq_rec_type, msi_num, msiq_id); 669 hdlp, msiq_rec_type, msi_num, msiq_id); 679 PX_INTR_STATE_ENABLE, msiq_rec_type, msi_num); 696 hdlp->ih_pri, PX_INTR_STATE_DISABLE, msiq_rec_type, [all...] |
/opensolaris-onvv-gate/usr/src/uts/sun4v/io/px/ |
H A D | px_lib4v.c | 965 if (!curr_msiq_rec_p->msiq_rec_type) { 966 /* Set msiq_rec_type to zero */ 967 msiq_rec_p->msiq_rec_type = 0; 983 /* Zero out msiq_rec_type field */ 984 curr_msiq_rec_p->msiq_rec_type = 0;
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/opensolaris-onvv-gate/usr/src/uts/sun4u/io/px/ |
H A D | px_lib4u.c | 1002 /* Set msiq_rec_type to zero */ 1003 msiq_rec_p->msiq_rec_type = 0; 1023 msiq_rec_p->msiq_rec_type = MSI32_REC; 1029 msiq_rec_p->msiq_rec_type = MSI64_REC; 1035 msiq_rec_p->msiq_rec_type = MSG_REC;
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