Searched refs:MSG_REC (Results 1 - 7 of 7) sorted by relevance
| /opensolaris-onvv-gate/usr/src/uts/sun4/io/px/ |
| H A D | px_pec.c | 164 MSG_REC, (msgcode_t)PCIE_CORR_MSG, -1,
176 PX_ERR_LOW_PIL, PX_INTR_STATE_ENABLE, MSG_REC,
187 MSG_REC, (msgcode_t)PCIE_NONFATAL_MSG, -1,
200 PX_ERR_PIL, PX_INTR_STATE_ENABLE, MSG_REC,
211 MSG_REC, (msgcode_t)PCIE_FATAL_MSG, -1,
223 PX_INTR_STATE_ENABLE, MSG_REC, PCIE_FATAL_MSG)) != DDI_SUCCESS) {
259 (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC,
264 PX_ERR_LOW_PIL, PX_INTR_STATE_DISABLE, MSG_REC,
276 (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC,
281 PX_ERR_PIL, PX_INTR_STATE_DISABLE, MSG_REC,
[all...] |
| H A D | px_ioapi.h | 511 MSG_REC = (uint32_t)1, /* PCIe message record */ enumerator in enum:msiq_rec_type
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| H A D | px.c | 650 if (px_add_msiq_intr(dip, dip, &hdl, MSG_REC,
662 PX_INTR_STATE_ENABLE, MSG_REC, PCIE_PME_ACK_MSG) != DDI_SUCCESS) {
672 (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC, PCIE_PME_ACK_MSG,
702 (void) px_rem_msiq_intr(dip, dip, &hdl, MSG_REC, PCIE_PME_ACK_MSG,
707 PX_INTR_STATE_DISABLE, MSG_REC, PCIE_PME_ACK_MSG);
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| H A D | px_msiq.c | 159 if (rec_type == MSG_REC) {
241 if (rec_type == MSG_REC) {
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| H A D | px_intr.c | 324 case MSG_REC:
378 if ((rec_type == MSG_REC) &&
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| /opensolaris-onvv-gate/usr/src/cmd/mdb/sparc/modules/intr/ |
| H A D | intr.c | 425 if (ih.ih_rec_type != MSG_REC) {
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| /opensolaris-onvv-gate/usr/src/uts/sun4u/io/px/ |
| H A D | px_lib4u.c | 1035 msiq_rec_p->msiq_rec_type = MSG_REC;
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