Searched refs:HWS_PGA (Results 1 - 4 of 4) sorted by relevance

/opensolaris-onvv-gate/usr/src/uts/intel/io/drm/
H A Di915_dma.c102 I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
103 (void) I915_READ(HWS_PGA);
118 I915_WRITE(HWS_PGA, 0x1ffff000);
125 I915_WRITE(HWS_PGA, 0x1ffff000);
255 I915_WRITE(HWS_PGA, dev_priv->dma_status_page);
257 I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
899 I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
H A Di915_drv.c693 S3_WRITE(HWS_PGA, s3_priv->saveHWS);
695 (void) S3_READ(HWS_PGA);
747 s3_priv->saveHWS = S3_READ(HWS_PGA);
H A Di915_gem.c2688 I915_WRITE(HWS_PGA, dev_priv->status_gfx_addr);
2689 (void) I915_READ(HWS_PGA); /* posting read */
2714 /* Write high address into HWS_PGA when disabling. */
2715 I915_WRITE(HWS_PGA, 0x1ffff000);
H A Di915_drv.h748 #define HWS_PGA 0x02080 macro

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