Searched refs:CR0_WP (Results 1 - 10 of 10) sorted by relevance

/opensolaris-onvv-gate/usr/src/grub/grub-0.97/stage2/
H A Dcontrolregs.h48 #define CR0_WP 0x00010000 /* write protect */ macro
/opensolaris-onvv-gate/usr/src/uts/intel/sys/
H A Dcontrolregs.h50 #define CR0_WP 0x00010000 /* write protect */ macro
/opensolaris-onvv-gate/usr/src/uts/i86pc/vm/
H A Dhtable.h319 setcr0((getcr0() & ~CR0_WP) & 0xffffffff); \
324 setcr0((getcr0() | CR0_WP) & 0xffffffff); \
/opensolaris-onvv-gate/usr/src/uts/i86pc/dboot/
H A Ddboot_grub.s176 orl $_CONST(CR0_PG | CR0_WP | CR0_AM), %eax
/opensolaris-onvv-gate/usr/src/uts/i86pc/ml/
H A Dmpcore.s105 D16 orl $[CR0_PE|CR0_WP|CR0_AM], %eax
360 orl $(CR0_PE|CR0_WP|CR0_AM), %eax
626 D16 orl $[CR0_PG|CR0_PE|CR0_WP|CR0_AM], %eax
718 D16 or $(CR0_PG|CR0_PE|CR0_WP|CR0_AM), %eax
H A Dfb_swtch_src.s274 orl $_CONST(CR0_PG | CR0_WP | CR0_AM), %eax
H A Dlocore.s202 orq $_CONST(CR0_WP|CR0_AM), %rax
298 orl $_CONST(CR0_WP|CR0_AM), %eax
H A Dcpr_wakecode.s312 D16 orl $[CR0_PE|CR0_WP|CR0_AM], %eax
/opensolaris-onvv-gate/usr/src/uts/intel/kdi/amd64/
H A Dkdi_asm.s502 andq $_BITNOT(CR0_WP), %rcx
/opensolaris-onvv-gate/usr/src/uts/intel/kdi/ia32/
H A Dkdi_asm.s498 andl $_BITNOT(CR0_WP), %ecx

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