/openjdk9/hotspot/src/cpu/x86/vm/ |
H A D | macroAssembler_x86_exp.cpp | 193 // scratch: xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7 198 void MacroAssembler::fast_exp(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) { argument 224 movdqu(xmm6, ExternalAddress(Shifter)); // 0x00000000UL, 0x43380000UL, 0x00000000UL, 0x43380000UL 236 addpd(xmm1, xmm6); 238 subpd(xmm1, xmm6); 250 movdqu(xmm6, ExternalAddress(mmask)); // 0xffffffc0UL, 0x00000000UL, 0xffffffc0UL, 0x00000000UL 251 pand(xmm7, xmm6); 252 movdqu(xmm6, ExternalAddress(bias)); // 0x0000ffc0UL, 0x00000000UL, 0x0000ffc0UL, 0x00000000UL 253 paddq(xmm7, xmm6); 259 movapd(xmm6, xmm 487 fast_exp(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) argument 580 movsd(Address(rsp, 16), xmm6); local [all...] |
H A D | macroAssembler_x86_cos.cpp | 188 void MacroAssembler::fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register r8, Register r9, Register r10, Register r11) { argument 254 movdqu(xmm6, ExternalAddress(SC_2)); //0x11111111UL, 0x3f811111UL, 0x55555555UL, 0x3fa55555UL 266 mulpd(xmm6, xmm0); 272 addpd(xmm6, ExternalAddress(SC_1)); //0x55555555UL, 0xbfc55555UL, 0x00000000UL, 0xbfe00000UL 279 addpd(xmm6, xmm5); 284 mulpd(xmm6, xmm2); 289 addsd(xmm0, xmm6); 290 unpckhpd(xmm6, xmm6); 291 addsd(xmm0, xmm6); 762 fast_cos(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) argument [all...] |
H A D | macroAssembler_x86_log.cpp | 187 // scratch: xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7 190 void MacroAssembler::fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp1, Register tmp2) { argument 222 pshufd(xmm6, xmm5, 228); 234 pand(xmm0, xmm6); 241 movq(xmm6, ExternalAddress(log2)); // 0xfefa3800UL, 0x3fa62e42UL 250 mulsd(xmm6, xmm7); 260 addsd(xmm0, xmm6); 264 movddup(xmm6, xmm0); 267 movdqu(xmm6, xmm0); 268 movlhps(xmm6, xmm 486 fast_log(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) argument [all...] |
H A D | macroAssembler_x86_pow.cpp | 770 // scratch: xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7 775 void MacroAssembler::fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp1, Register tmp2, Register tmp3, Register tmp4) { argument 832 movdqu(xmm6, ExternalAddress(HIGHSIGMASK)); //0x00000000UL, 0xfffff800UL, 0x00000000UL, 0xfffff800UL 866 pand(xmm0, xmm6); 885 movdqu(xmm6, ExternalAddress(32 + coeff)); //0x518775e3UL, 0x3f9004f2UL, 0xac8349bbUL, 0x3fa76c9bUL 897 addpd(xmm6, xmm1); 904 mulpd(xmm6, xmm2); 911 mulpd(xmm3, xmm6); 914 xorpd(xmm6, xmm6); 2493 fast_pow(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) argument [all...] |
H A D | macroAssembler_x86_sha.cpp | 852 vperm2i128(xmm6, xmm1, xmm3, 0x20); 866 sha256_AVX2_one_round_and_sched(xmm4, xmm5, xmm6, xmm7, rax, rbx, rdi, rsi, r8, r9, r10, r11, 0); 867 sha256_AVX2_one_round_and_sched(xmm4, xmm5, xmm6, xmm7, r11, rax, rbx, rdi, rsi, r8, r9, r10, 1); 868 sha256_AVX2_one_round_and_sched(xmm4, xmm5, xmm6, xmm7, r10, r11, rax, rbx, rdi, rsi, r8, r9, 2); 869 sha256_AVX2_one_round_and_sched(xmm4, xmm5, xmm6, xmm7, r9, r10, r11, rax, rbx, rdi, rsi, r8, 3); 873 sha256_AVX2_one_round_and_sched(xmm5, xmm6, xmm7, xmm4, r8, r9, r10, r11, rax, rbx, rdi, rsi, 8+0); 874 sha256_AVX2_one_round_and_sched(xmm5, xmm6, xmm7, xmm4, rsi, r8, r9, r10, r11, rax, rbx, rdi, 8+1); 875 sha256_AVX2_one_round_and_sched(xmm5, xmm6, xmm7, xmm4, rdi, rsi, r8, r9, r10, r11, rax, rbx, 8+2); 876 sha256_AVX2_one_round_and_sched(xmm5, xmm6, xmm7, xmm4, rbx, rdi, rsi, r8, r9, r10, r11, rax, 8+3); 878 vpaddd(xmm9, xmm6, Addres 1098 sha512_AVX2_one_round_and_schedule( XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register a, Register b, Register c, Register d, Register e, Register f, Register g, Register h, int iteration) argument [all...] |
H A D | macroAssembler_x86_log10.cpp | 198 // scratch: xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7 203 void MacroAssembler::fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register r11) { argument 241 pshufd(xmm6, xmm5, 78); 256 andpd(xmm0, xmm6); 262 movq(xmm6, ExternalAddress(log2)); //0x509f7800UL, 0x3f934413UL, 0x1f12b358UL, 0x3cdfef31UL 271 mulsd(xmm6, xmm7); 275 addsd(xmm0, xmm6); 277 movq(xmm6, ExternalAddress(8 + LOG10_E)); //0xbf2e4108UL, 0x3f5a7a6cUL 285 mulsd(xmm6, xmm1); 290 addsd(xmm1, xmm6); 506 fast_log10(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) argument [all...] |
H A D | macroAssembler_x86_sin.cpp | 386 void MacroAssembler::fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ebx, Register ecx, Register edx, Register tmp1, Register tmp2, Register tmp3, Register tmp4) { argument 432 movdqu(xmm6, ExternalAddress(P_2)); //0x1a600000UL, 0x3d90b461UL, 0x1a600000UL, 0x3d90b461UL 448 mulpd(xmm6, xmm1); 460 subsd(xmm4, xmm6); 464 subpd(xmm0, xmm6); 469 subsd(xmm3, xmm6); 470 movdqu(xmm6, ExternalAddress(SC_2)); //0x11111111UL, 0x3f811111UL, 0x55555555UL, 0x3fa55555UL 476 mulpd(xmm6, xmm0); 482 addpd(xmm6, ExternalAddress(SC_1)); //0x55555555UL, 0xbfc55555UL, 0x00000000UL, 0xbfe00000UL 489 addpd(xmm6, xmm 2319 fast_sin(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ebx, Register edx) argument [all...] |
H A D | macroAssembler_x86_tan.cpp | 504 void MacroAssembler::fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register r8, Register r9, Register r10, Register r11) { argument 545 movdqu(xmm6, ExternalAddress(MUL16)); //0x00000000UL, 0x40300000UL, 0x00000000UL, 0x3ff00000UL 558 mulpd(xmm1, xmm6); 577 movq(xmm6, ExternalAddress(ONE)); //0x00000000UL, 0x3ff00000UL 585 divsd(xmm6, xmm5); 634 mulsd(xmm4, xmm6); 636 andpd(xmm2, xmm6); 638 mulsd(xmm6, Address(rax, 160)); 642 mulsd(xmm7, xmm6); 873 movdqu(xmm6, ExternalAddres 1971 fast_tan(XMMRegister xmm0, XMMRegister xmm1, XMMRegister xmm2, XMMRegister xmm3, XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register eax, Register ecx, Register edx, Register tmp) argument [all...] |
H A D | register_definitions_x86.cpp | 60 REGISTER_DEFINITION(XMMRegister, xmm6 );
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H A D | register_x86.hpp | 182 CONSTANT_REGISTER_DECLARATION(XMMRegister, xmm6 , ( 6));
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H A D | macroAssembler_x86.hpp | 954 void sha512_AVX2_one_round_and_schedule(XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, 984 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, 989 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, 993 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, 997 XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, Register rax, Register rcx, 1001 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, 1006 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, 1010 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, 1015 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegister xmm7, 1019 XMMRegister xmm4, XMMRegister xmm5, XMMRegister xmm6, XMMRegiste [all...] |
H A D | c1_FrameMap_x86.cpp | 224 _xmm_regs[6] = xmm6;
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H A D | stubGenerator_x86_32.cpp | 804 __ movq(xmm6, Address(from, 48)); 805 __ movq(Address(from, to_from, Address::times_1, 48), xmm6); local 2577 const XMMRegister xmm_result2 = xmm6; 2809 const XMMRegister xmm_result2 = xmm6; 3065 const XMMRegister msg3 = xmm6; 3127 const XMMRegister msgtmp3 = xmm6; 3199 const XMMRegister xmm_temp6 = xmm6; 3241 __ pclmulqdq(xmm_temp6, xmm_temp1, 17); // xmm6 holds a1*b1 3249 __ pxor(xmm_temp6, xmm_temp4); // Register pair <xmm6:xmm3> holds the result 3302 __ pxor(xmm_temp6, xmm_temp3); // the result is in xmm6 [all...] |
H A D | stubGenerator_x86_64.cpp | 129 // -9 [ saved xmm6 ] (each xmm register takes 2 slots) 154 xmm_save_first = 6, // save from xmm6 2998 // On win64 xmm6-xmm15 must be preserved so don't use them. 3100 // On win64 xmm6-xmm15 must be preserved so don't use them. 3679 const XMMRegister msg3 = xmm6; 3760 const XMMRegister msgtmp3 = xmm6; 3801 const XMMRegister msgtmp3 = xmm6; 3875 const XMMRegister xmm_result1 = xmm6; 4170 const XMMRegister xmm_temp6 = xmm6; 4212 __ pclmulqdq(xmm_temp6, xmm_temp1, 17); // xmm6 hold [all...] |
H A D | assembler_x86.hpp | 87 REGISTER_DECLARATION(XMMRegister, c_farg6, xmm6); 127 REGISTER_DECLARATION(XMMRegister, j_farg6, xmm6);
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H A D | assembler_x86.cpp | 5652 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66, VEX_OPCODE_0F, &attributes); 5662 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66, VEX_OPCODE_0F, &attributes); 5672 int encode = simd_prefix_and_encode(xmm6, dst, dst, VEX_SIMD_66, VEX_OPCODE_0F, &attributes); 5707 int encode = vex_prefix_and_encode(xmm6->encoding(), dst->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F, &attributes); 5718 int encode = vex_prefix_and_encode(xmm6->encoding(), dst->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F, &attributes); 5729 int encode = vex_prefix_and_encode(xmm6->encoding(), dst->encoding(), src->encoding(), VEX_SIMD_66, VEX_OPCODE_0F, &attributes);
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/openjdk9/hotspot/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.amd64/src/jdk/vm/ci/amd64/ |
H A D | AMD64.java | 82 public static final Register xmm6 = new Register(22, 6, "xmm6", XMM); field in class:AMD64 113 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, 118 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, 138 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, 145 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7, 160 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
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/openjdk9/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.hotspot.amd64/src/org/graalvm/compiler/hotspot/amd64/ |
H A D | AMD64HotSpotRegisterAllocationConfig.java | 51 import static jdk.vm.ci.amd64.AMD64.xmm6; 79 xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7,
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H A D | AMD64HotSpotBackendFactory.java | 219 callerSave.remove(AMD64.xmm6);
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/openjdk9/hotspot/src/cpu/aarch64/vm/ |
H A D | aarch64_linkage.S | 75 movd %xmm6, (%rsp) 142 movd (%rsp), %xmm6
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/openjdk9/hotspot/src/jdk.internal.vm.ci/share/classes/jdk.vm.ci.hotspot.amd64/src/jdk/vm/ci/hotspot/amd64/ |
H A D | AMD64HotSpotRegisterConfig.java | 41 import static jdk.vm.ci.amd64.AMD64.xmm6; 160 nativeXMMParameterRegisters = new RegisterArray(xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7); 163 javaXMMParameterRegisters = new RegisterArray(xmm0, xmm1, xmm2, xmm3, xmm4, xmm5, xmm6, xmm7);
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/openjdk9/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.asm.amd64/src/org/graalvm/compiler/asm/amd64/ |
H A D | AMD64Assembler.java | 2578 int encode = simdPrefixAndEncode(AMD64.xmm6, dst, dst, VexSimdPrefix.VEX_SIMD_66, VexOpcode.VEX_OPCODE_0F, attributes); 2597 int encode = simdPrefixAndEncode(AMD64.xmm6, dst, dst, VexSimdPrefix.VEX_SIMD_66, VexOpcode.VEX_OPCODE_0F, attributes);
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