| /openjdk10/hotspot/src/cpu/aarch64/vm/ |
| H A D | c1_LIR_aarch64.cpp | 38 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) { argument
40 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
41 (reg1 << LIR_OprDesc::reg2_shift) |
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| H A D | c1_LIRAssembler_aarch64.cpp | 1905 Register reg1 = as_reg(opr1); local
1910 __ cmp(reg1, reg2);
1913 __ cmpw(reg1, reg2);
1920 __ cmp(reg1, reg2);
1951 __ cmpw(reg1, imm);
1953 __ cmp(reg1, imm);
1958 __ cmpw(reg1, rscratch1);
1960 __ cmp(reg1, rscratch1);
1966 FloatRegister reg1 = opr1->as_float_reg(); local
1969 __ fcmps(reg1, reg
1971 FloatRegister reg1 = opr1->as_double_reg(); local
[all...] |
| H A D | c1_LIRGenerator_aarch64.cpp | 282 LIR_Opr reg1 = new_register(T_INT); local
283 __ load(generate_address(base, disp, type), reg1, info); local
284 __ cmp(condition, reg, reg1);
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| H A D | macroAssembler_aarch64.cpp | 4211 void MacroAssembler::adrp(Register reg1, const Address &dest, unsigned long &byte_offset) {
4227 _adrp(reg1, dest.target());
4233 _adrp(reg1, (address)adrp_target);
4234 movk(reg1, target >> 32, 32);
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| H A D | macroAssembler_aarch64.hpp | 1130 void adrp(Register reg1, const Address &dest, unsigned long &byte_offset);
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| H A D | assembler_aarch64.cpp | 1258 void Assembler::adrp(Register reg1, const Address &dest, unsigned long &byte_offset) { argument
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| /openjdk10/hotspot/src/cpu/s390/vm/ |
| H A D | c1_LIR_s390.cpp | 41 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) { argument
43 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
44 (reg1 << LIR_OprDesc::reg2_shift) |
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| H A D | c1_LIRAssembler_s390.cpp | 1203 Register reg1 = opr1->as_register(); local
1207 __ z_clgr(reg1, opr2->as_register());
1211 __ z_clr(reg1, opr2->as_register());
1213 __ z_cr(reg1, opr2->as_register());
1219 __ z_cg(reg1, frame_map()->address_for_slot(opr2->single_stack_ix()));
1222 __ z_cly(reg1, frame_map()->address_for_slot(opr2->single_stack_ix()));
1224 __ z_cy(reg1, frame_map()->address_for_slot(opr2->single_stack_ix()));
1232 __ z_clfi(reg1, c->as_jint());
1234 __ z_cfi(reg1, c->as_jint());
1240 __ z_ltgr(reg1, reg
[all...] |
| /openjdk10/hotspot/src/cpu/ppc/vm/ |
| H A D | c1_LIR_ppc.cpp | 39 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) { argument
41 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
42 (reg1 << LIR_OprDesc::reg2_shift) |
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| /openjdk10/hotspot/src/cpu/arm/vm/ |
| H A D | c1_LIR_arm.cpp | 38 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) { argument
40 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
41 (reg1 << LIR_OprDesc::reg2_shift) |
47 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) { argument
49 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
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| H A D | interp_masm_arm.cpp | 2030 Register reg1,
2041 assert(reg1 != noreg, "must specify reg1");
2045 stp(reg1, reg2, Address(Rstack_top, -2*wordSize, pre_indexed));
2049 push(RegisterSet(reg1) | RegisterSet(reg2));
2059 ldp(reg1, reg2, Address(Rstack_top, 2*wordSize, post_indexed));
2061 pop(RegisterSet(reg1) | RegisterSet(reg2));
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| H A D | interp_masm_arm.hpp | 338 Register reg1 = noreg,
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| /openjdk10/hotspot/src/cpu/sparc/vm/ |
| H A D | c1_LIR_sparc.cpp | 38 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) { argument
40 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
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| /openjdk10/hotspot/src/cpu/x86/vm/ |
| H A D | c1_LIR_x86.cpp | 51 LIR_Opr LIR_OprFact::double_fpu(int reg1, int reg2) { argument
53 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
54 (reg1 << LIR_OprDesc::reg2_shift) |
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| H A D | c1_LIRAssembler_x86.cpp | 2570 Register reg1 = opr1->as_register(); local
2574 __ cmpptr(reg1, opr2->as_register());
2577 __ cmpl(reg1, opr2->as_register());
2582 __ cmpptr(reg1, frame_map()->address_for_slot(opr2->single_stack_ix()));
2584 __ cmpl(reg1, frame_map()->address_for_slot(opr2->single_stack_ix()));
2590 __ cmpl(reg1, c->as_jint());
2595 __ cmpptr(reg1, (int32_t)NULL_WORD);
2599 __ cmpptr(reg1, rscratch1);
2601 __ cmpoop(reg1, c->as_jobject());
2612 __ cmpl(reg1, as_Addres
2647 XMMRegister reg1 = opr1->as_xmm_float_reg(); local
2668 XMMRegister reg1 = opr1->as_xmm_double_reg(); local
[all...] |
| /openjdk10/hotspot/src/share/vm/opto/ |
| H A D | matcher.cpp | 272 OptoReg::Name reg1 = warp_incoming_stk_arg(vm_parm_regs[i].first()); local
273 if( OptoReg::is_valid(reg1))
274 _calling_convention_mask[i].Insert(reg1);
281 _parm_regs[i].set_pair(reg2, reg1);
1241 VMReg reg1 = parm_regs[i].first(); local
1248 if( !reg1->is_valid() ) {
1253 assert( reg1 != reg2, "calling conv. must produce distinct regs");
1254 assert( reg1 != reg3, "calling conv. must produce distinct regs");
1255 assert( reg1 != reg4, "calling conv. must produce distinct regs");
1277 OptoReg::Name reg1 local
[all...] |
| /openjdk10/hotspot/src/share/vm/c1/ |
| H A D | c1_LIR.hpp | 597 static LIR_Opr double_cpu(int reg1, int reg2) { argument
598 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
599 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
614 static LIR_Opr double_fpu(int reg1, int reg2 = -1 /*fnoreg*/);
623 static LIR_Opr double_softfp(int reg1, int reg2) { argument
624 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
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| /openjdk10/hotspot/src/share/vm/runtime/ |
| H A D | sharedRuntime.cpp | 2971 VMReg reg1 = regs[i].first();
2972 if (reg1->is_stack()) {
2974 reg1 = reg1->bias(out_preserve_stack_slots());
2981 regs[i].set_pair(reg2, reg1);
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