Searched refs:imm (Results 1 - 25 of 43) sorted by relevance

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/openjdk10/hotspot/src/cpu/arm/vm/
H A Dassembler_arm_32.cpp75 void AsmOperand::initialize_rotated_imm(unsigned int imm) { argument
77 if ((imm & ~(0xff << shift)) == 0) {
78 _encoding = 1 << 25 | (32 - shift) << 7 | imm >> shift;
82 assert((imm & 0x0ffffff0) == 0, "too complicated constant: %d (%x)", imm, imm);
83 _encoding = 1 << 25 | 4 << 7 | imm >> 28 | imm << 4;
86 bool AsmOperand::is_rotated_imm(unsigned int imm) { argument
87 if ((imm >>
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H A Dassembler_arm_64.cpp51 // Returns whether given imm has equal bit fields <0:size-1> and <size:2*size-1>.
52 inline bool Assembler::LogicalImmediate::has_equal_subpatterns(uintx imm, int size) { argument
54 uintx subpattern1 = mask_bits(imm, mask);
55 uintx subpattern2 = mask_bits(imm >> size, mask);
60 // imm is composed of repeating patterns of this size.
61 inline int Assembler::LogicalImmediate::least_pattern_size(uintx imm) { argument
63 while (size > 2 && has_equal_subpatterns(imm, size >> 1)) {
69 // Returns count of set bits in given imm. Based on variable-precision SWAR algorithm.
120 // Constructs LogicalImmediate by given imm. Figures out if given imm ca
122 construct(uintx imm, bool is32) argument
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H A Dassembler_arm_64.hpp126 static inline bool has_equal_subpatterns(uintx imm, int size);
127 static inline int least_pattern_size(uintx imm);
135 void construct(uintx imm, bool is32);
138 LogicalImmediate(uintx imm, bool is32 = false) { construct(imm, is32); } argument
184 int imm() const { assert(_encoded, "should be"); return _imm; } function in class:Assembler::ArithmeticImmediate
495 void mnemonic(Register rd, Register rn, const LogicalImmediate& imm) { \
496 assert (imm.is_encoded(), "illegal immediate for logical instruction"); \
497 assert (imm.is32bit() == (sf == 0), "immediate size does not match instruction size"); \
498 emit_int32(sf << 31 | opc << 29 | 0b100100 << 23 | imm
521 tst(Register rn, unsigned int imm) argument
525 tst_w(Register rn, unsigned int imm) argument
626 cmp(Register rn, int imm) argument
630 cmp_w(Register rn, int imm) argument
653 cmn(Register rn, int imm) argument
657 cmn_w(Register rn, int imm) argument
727 mov(Register rd, int imm) argument
732 mov_w(Register rd, int imm) argument
1457 vshli(FloatRegister fd, FloatRegister fn, int esize, int imm, int quad) argument
1477 vshri(FloatRegister fd, FloatRegister fn, int esize, int imm, bool U , int quad) argument
1493 vshrUI(FloatRegister fd, FloatRegister fm, int size, int imm, int quad) argument
1496 vshrSI(FloatRegister fd, FloatRegister fm, int size, int imm, int quad) argument
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H A Dassembler_arm_32.hpp33 void initialize_rotated_imm(unsigned int imm);
97 static bool is_rotated_imm(unsigned int imm);
722 void vshli(FloatRegister fd, FloatRegister fm, int size, int imm, int quad) {
730 if (imm >= size) {
736 assert(imm >= 0 && imm < size, "out of range");
744 imm6 = size + imm ;
748 imm6 = imm ;
759 void vshri(FloatRegister fd, FloatRegister fm, int size, int imm,
767 assert(imm >
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H A DmacroAssembler_arm.hpp807 void mov(Register rd, int imm) { Assembler::mov(rd, imm); } argument
809 void mov(Register dst, int imm, AsmCondition cond) { argument
810 assert(imm == 0 || imm == 1, "");
811 if (imm == 0) {
813 } else if (imm == 1) {
815 } else if (imm == -1) {
818 fatal("illegal mov(R%d,%d,cond)", dst->encoding(), imm);
917 // If <cond> holds, compares r and imm
918 cond_cmp(Register r, int imm, AsmCondition cond) argument
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/openjdk10/jdk/src/java.desktop/share/classes/sun/awt/im/
H A DInputMethodManager.java161 ExecutableInputMethodManager imm = new ExecutableInputMethodManager();
166 if (imm.hasMultipleInputMethods()) {
167 imm.initialize();
169 new Thread(null, imm, threadName, 0, false);
174 inputMethodManager = imm;
H A DInputContext.java122 InputMethodManager imm = InputMethodManager.getInstance();
126 if (imm.hasMultipleInputMethods()) {
131 selectInputMethod(imm.getDefaultKeyboardLocale());
/openjdk10/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.asm.aarch64/src/org/graalvm/compiler/asm/aarch64/
H A DAArch64MacroAssembler.java336 * @param imm
338 private void mov64(Register dst, long imm) { argument
342 int chunk = (int) (imm >> offset) & NumUtil.getNbitNumberInt(16);
360 * @param imm immediate loaded into register.
362 public void mov(Register dst, long imm) { argument
364 if (imm == 0L) {
366 } else if (LogicalImmediateTable.isRepresentable(true, imm) != LogicalImmediateTable.Representable.NO) {
367 or(64, dst, zr, imm);
368 } else if (imm >> 32 == -1L && (int) imm <
386 mov(Register dst, int imm) argument
400 movNativeAddress(Register dst, long imm) argument
423 movNarrowAddress(Register dst, long imm) argument
432 nrInstructionsToMoveImmediate(long imm) argument
801 isArithmeticImmediate(long imm) argument
813 isComparisonImmediate(long imm) argument
823 isMovableImmediate(long imm) argument
1020 isLogicalImmediate(long imm) argument
1027 isLogicalImmediate(int imm) argument
1065 fmov(int size, Register dst, double imm) argument
1079 isDoubleImmediate(double imm) argument
1088 isFloatImmediate(float imm) argument
1405 isBranchImmediateOffset(long imm) argument
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H A DAArch64Assembler.java166 Immediate imm = IMMEDIATE_TABLE[pos];
167 return imm.only64bit() ? Representable.SIXTY_FOUR_BIT_ONLY : Representable.YES;
177 Immediate imm = IMMEDIATE_TABLE[pos];
178 assert is64bit || !imm.only64bit() : "Immediate can only be represented for 64bit, but 32bit instruction specified";
188 Immediate imm;
196 imm = new Immediate(value << 32 | value);
198 imm = new Immediate(value);
200 int pos = Arrays.binarySearch(IMMEDIATE_TABLE, imm);
221 public final long imm; field in class:AArch64Assembler.LogicalImmediateTable.Immediate
224 Immediate(long imm, boolea argument
230 Immediate(long imm) argument
1426 encodeAimm(int imm) argument
1444 isAimm(int imm) argument
1650 add(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) argument
1664 adds(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) argument
1678 sub(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) argument
1692 subs(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) argument
1696 addSubShiftedInstruction(Instruction instr, Register dst, Register src1, Register src2, ShiftType shiftType, int imm, InstructionType type) argument
2265 fmov(int size, Register dst, double imm) argument
2278 getDoubleImmediate(double imm) argument
2289 isDoubleImmediate(double imm) argument
2307 getFloatImmediate(float imm) argument
2317 isFloatImmediate(float imm) argument
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/openjdk10/hotspot/src/cpu/aarch64/vm/
H A DmacroAssembler_aarch64.hpp139 void addmw(Address a, int imm, Register scratch) { argument
141 if (imm > 0)
142 addw(scratch, scratch, (unsigned)imm);
144 subw(scratch, scratch, (unsigned)-imm);
171 inline void cmpw(Register Rd, T imm) { subsw(zr, Rd, imm); } argument
172 // imm is limited to 12 bits.
173 inline void cmp(Register Rd, unsigned imm) { subs(zr, Rd, imm); } argument
175 inline void cmnw(Register Rd, unsigned imm) { adds argument
176 cmn(Register Rd, unsigned imm) argument
209 moviw(Register Rd, unsigned imm) argument
210 movi(Register Rd, unsigned imm) argument
215 tstw(Register Rd, uint64_t imm) argument
216 tst(Register Rd, uint64_t imm) argument
260 asrw(Register Rd, Register Rn, unsigned imm) argument
264 asr(Register Rd, Register Rn, unsigned imm) argument
268 lslw(Register Rd, Register Rn, unsigned imm) argument
272 lsl(Register Rd, Register Rn, unsigned imm) argument
276 lsrw(Register Rd, Register Rn, unsigned imm) argument
280 lsr(Register Rd, Register Rn, unsigned imm) argument
284 rorw(Register Rd, Register Rn, unsigned imm) argument
288 ror(Register Rd, Register Rn, unsigned imm) argument
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H A Dassembler_aarch64.cpp1400 int imm; member in union:__anon1
1404 bool neg = imm < 0;
1406 imm = -imm;
1409 assert(Rd != sp || imm % 16 == 0, "misaligned stack");
1410 if (imm >= (1 << 11)
1411 && ((imm >> 12) << 12 == imm)) {
1412 imm >>= 12;
1415 f(op, 31, 29), f(0b10001, 28, 24), f(shift, 23, 22), f(imm, 2
1427 operand_valid_for_add_sub_immediate(long imm) argument
1439 operand_valid_for_logical_immediate(bool is32, uint64_t imm) argument
1453 operand_valid_for_float_immediate(double imm) argument
1492 encode_logical_immediate(bool is32, uint64_t imm) argument
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H A Dassembler_aarch64.hpp145 uint32_t encode_logical_immediate(bool is32, uint64_t imm);
736 void NAME(Register Rd, Register Rn, unsigned imm, unsigned shift) { \
738 f(decode, 31, 29), f(0b10001, 28, 24), f(shift, 23, 22), f(imm, 21, 10); \
742 void NAME(Register Rd, Register Rn, unsigned imm) { \
744 add_sub_immediate(Rd, Rn, imm, decode, negated); \
755 void NAME(Register Rd, Register Rn, unsigned imm) { \
757 add_sub_immediate(Rd, Rn, imm, decode, negated); \
769 void NAME(Register Rd, Register Rn, uint64_t imm) { \
771 uint32_t val = encode_logical_immediate(is32, imm); \
786 void NAME(Register Rd, Register Rn, uint64_t imm) { \
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/openjdk10/jdk/src/java.desktop/windows/native/libawt/windows/
H A Dawt_InputTextInfor.h37 #include <imm.h>
/openjdk10/jdk/src/java.desktop/windows/classes/sun/awt/windows/
H A DWDialogPeer.java43 InputMethodManager imm = InputMethodManager.getInstance();
44 String menuString = imm.getTriggerMenuString();
H A DWFramePeer.java183 InputMethodManager imm = InputMethodManager.getInstance();
184 String menuString = imm.getTriggerMenuString();
/openjdk10/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir.amd64/src/org/graalvm/compiler/lir/amd64/
H A DAMD64Move.java696 final long imm;
699 imm = input.asInt();
702 imm = input.asLong();
705 imm = floatToRawIntBits(input.asFloat());
708 imm = doubleToRawLongBits(input.asDouble());
712 imm = 0;
723 assert NumUtil.isByte(imm) : "Is not in byte range: " + imm;
724 AMD64MIOp.MOVB.emit(masm, OperandSize.BYTE, dest, (int) imm);
727 assert NumUtil.isShort(imm)
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/openjdk10/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.asm.aarch64.test/src/org/graalvm/compiler/asm/aarch64/test/
H A DTestProtectedAssembler.java229 public void adds(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) { argument
230 super.adds(size, dst, src1, src2, shiftType, imm);
234 public void subs(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) { argument
235 super.subs(size, dst, src1, src2, shiftType, imm);
239 protected void add(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) { argument
240 super.add(size, dst, src1, src2, shiftType, imm);
244 protected void sub(int size, Register dst, Register src1, Register src2, ShiftType shiftType, int imm) { argument
245 super.sub(size, dst, src1, src2, shiftType, imm);
409 protected void fmov(int size, Register dst, double imm) { argument
410 super.fmov(size, dst, imm);
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/openjdk10/hotspot/src/cpu/sparc/vm/
H A DnativeInst_sparc.hpp188 static int set_simm(int insn, int imm, int nbits) { argument
189 return (insn &~ Assembler::simm(-1, nbits)) | Assembler::simm(imm, nbits);
210 static bool set_simm13(int insn, int imm) { argument
212 return set_simm(insn, imm, 13);
239 static int set_data32_sethi(int sethi_insn, int imm) { argument
242 return (sethi_insn &~ Assembler::hi22(-1)) | Assembler::hi22(imm);
245 static int set_data32_simm13(int arith_insn, int imm) { argument
247 int imm10 = Assembler::low10(imm);
251 static int low10(int imm) { argument
252 return Assembler::low10(imm);
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/openjdk10/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.lir.aarch64/src/org/graalvm/compiler/lir/aarch64/
H A DAArch64ControlFlow.java288 long imm = c.getJavaConstant().asLong();
290 if (AArch64MacroAssembler.isComparisonImmediate(imm)) {
291 masm.cmp(size, asRegister(key), (int) imm);
/openjdk10/hotspot/src/cpu/x86/vm/
H A Dinterp_masm_x86.hpp159 void push(int32_t imm ) { ((MacroAssembler*)this)->push(imm); }
/openjdk10/hotspot/src/cpu/s390/vm/
H A DmacroAssembler_s390.inline.hpp61 inline int MacroAssembler::store_const(const Address &dest, long imm, Register scratch, bool is_long) { argument
64 return store_const(dest, imm, lm, lc, scratch);
/openjdk10/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.asm.amd64/src/org/graalvm/compiler/asm/amd64/
H A DAMD64Assembler.java230 protected void emitImmediate(AMD64Assembler asm, int imm) {
231 assert imm == (byte) imm;
232 asm.emitByte(imm);
243 protected void emitImmediate(AMD64Assembler asm, int imm) {
244 assert imm == (short) imm;
245 asm.emitShort(imm);
256 protected void emitImmediate(AMD64Assembler asm, int imm) {
257 asm.emitInt(imm);
324 emitImmediate(AMD64Assembler asm, int imm) argument
703 emitImmediate(AMD64Assembler asm, OperandSize size, int imm) argument
1325 emit(AMD64Assembler asm, OperandSize size, Register dst, int imm) argument
1332 emit(AMD64Assembler asm, OperandSize size, AMD64Address dst, int imm) argument
1362 emit(AMD64Assembler asm, OperandSize size, Register dst, Register src, int imm) argument
1424 emit(AMD64Assembler asm, OperandSize size, Register dst, AMD64Address src, int imm) argument
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/openjdk10/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.asm.sparc/src/org/graalvm/compiler/asm/sparc/
H A DSPARCAssembler.java1738 * Test if imm is within signed immediate range for nbits.
1740 public static boolean isSimm(long imm, int nbits) { argument
1741 return minSimm(nbits) <= imm && imm <= maxSimm(nbits);
1744 public static boolean isSimm10(long imm) { argument
1745 return isSimm(imm, 10);
1748 public static boolean isSimm11(long imm) { argument
1749 return isSimm(imm, 11);
1760 public static boolean isSimm5(long imm) { argument
1761 return isSimm(imm,
1764 isSimm13(int imm) argument
1786 isSimm13(long imm) argument
1790 isWordDisp30(long imm) argument
2208 movcc(ConditionFlag conditionFlag, CC cc, int i, int imm, Register rd) argument
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/openjdk10/hotspot/src/jdk.internal.vm.compiler/share/classes/org.graalvm.compiler.core.amd64/src/org/graalvm/compiler/core/amd64/
H A DAMD64ArithmeticLIRGenerator.java345 int imm = (int) value;
347 if (NumUtil.isByte(imm)) {
354 getLIRGen().append(new AMD64Binary.RMIOp(op, size, ret, a, imm));
1126 long imm;
1132 imm = jc.asInt();
1136 imm = jc.asInt();
1140 imm = jc.asInt();
1144 imm = jc.asLong();
1148 imm = Float.floatToRawIntBits(jc.asFloat());
1152 imm
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/openjdk10/hotspot/test/compiler/jvmci/jdk.vm.ci.code.test/src/jdk/vm/ci/code/test/sparc/
H A DSPARCTestAssembler.java92 * Test if imm is within signed immediate range for nbits.
94 public static boolean isSimm(long imm, int nbits) { argument
95 return minSimm(nbits) <= imm && imm <= maxSimm(nbits);

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