| /openjdk10/hotspot/src/cpu/sparc/vm/ |
| H A D | assembler_sparc.inline.hpp | 86 emit_int32(op(arith_op) | rd(d) | op3(add_op3) | rs1(s1) | rs2(s2));
89 emit_int32(op(arith_op) | rd(d) | op3(add_op3) | rs1(s1) | immed(true) | simm(simm13a, 13));
93 emit_int32(op(arith_op) | rd(d) | op3(add_op3 | cc_bit_op3) | rs1(s1) | rs2(s2));
96 emit_int32(op(arith_op) | rd(d) | op3(add_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13));
99 emit_int32(op(arith_op) | rd(d) | op3(addc_op3) | rs1(s1) | rs2(s2));
102 emit_int32(op(arith_op) | rd(d) | op3(addc_op3) | rs1(s1) | immed(true) | simm(simm13a, 13));
105 emit_int32(op(arith_op) | rd(d) | op3(addc_op3 | cc_bit_op3) | rs1(s1) | rs2(s2));
108 emit_int32(op(arith_op) | rd(d) | op3(addc_op3 | cc_bit_op3) | rs1(s1) | immed(true) | simm(simm13a, 13));
113 emit_int32(op(arith_op) | fd(d, FloatRegisterImpl::D) | op3(aes4_op3) | fs1(s1, FloatRegisterImpl::D) | fs3(s3, FloatRegisterImpl::D) | op5(aes_eround01_op5) | fs2(s2, FloatRegisterImpl::D));
117 emit_int32(op(arith_op) | f
[all...] |
| H A D | relocInfo_sparc.cpp | 68 case Assembler::arith_op:
109 guarantee(Assembler::inv_op(inst2)==Assembler::arith_op, "arith op");
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| H A D | nativeInst_sparc.cpp | 109 if (is_op3(x, temp, Assembler::arith_op) &&
161 assert(inv_op(*contention_addr) == Assembler::arith_op ||
180 assert(inv_op(*contention_addr) == Assembler::arith_op ||
474 is_op3(i2, Assembler::add_op3, Assembler::arith_op) &&
832 assert(is_op3(bits, Assembler::trap_op3, Assembler::arith_op), "bad instruction");
850 assert(is_op3(bits, Assembler::trap_op3, Assembler::arith_op), "bad instruction");
897 assert(inv_op(*contention_addr) == Assembler::arith_op ||
916 assert(inv_op(*contention_addr) == Assembler::arith_op ||
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| H A D | nativeInst_sparc.hpp | 55 bool is_call_reg() { return is_op(long_at(0), Assembler::arith_op); }
64 return (is_op(x, Assembler::arith_op) &&
78 return is_op3(x, Assembler::jmpl_op3, Assembler::arith_op)
115 return is_op3(x, Assembler::membar_op3, Assembler::arith_op) &&
204 Assembler::arith_op, Assembler::ldst_op) && member in class:VALUE_OBJ_CLASS_SPEC::Assembler
269 assert ( Assembler::inv_op(*pc) == Assembler::arith_op, "in gethi - must be arith_op" );
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| H A D | assembler_sparc.hpp | 50 arith_op = 2, // fmt 3, arith & misc enumerator in enum:Assembler::ops
483 if (inv_op(x) != Assembler::arith_op) return false;
491 return (inv_op(x) == Assembler::arith_op && inv_op3(x) == Assembler::rdreg_op3 &&
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| H A D | c1_LIRAssembler_sparc.cpp | 1611 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { function in class:LIR_Assembler
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| /openjdk10/hotspot/src/share/vm/c1/ |
| H A D | c1_LIRAssembler.hpp | 210 void arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack);
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| H A D | c1_LIRAssembler.cpp | 731 arith_op(
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| /openjdk10/hotspot/src/cpu/aarch64/vm/ |
| H A D | c1_LIRAssembler_aarch64.cpp | 1693 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { function in class:LIR_Assembler
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| /openjdk10/hotspot/src/cpu/ppc/vm/ |
| H A D | c1_LIRAssembler_ppc.cpp | 1615 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, function in class:LIR_Assembler
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| /openjdk10/hotspot/src/cpu/s390/vm/ |
| H A D | c1_LIRAssembler_s390.cpp | 1422 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, function in class:LIR_Assembler
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| /openjdk10/hotspot/src/cpu/arm/vm/ |
| H A D | c1_LIRAssembler_arm.cpp | 1942 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { function in class:LIR_Assembler
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| /openjdk10/hotspot/src/cpu/x86/vm/ |
| H A D | c1_LIRAssembler_x86.cpp | 1996 void LIR_Assembler::arith_op(LIR_Code code, LIR_Opr left, LIR_Opr right, LIR_Opr dest, CodeEmitInfo* info, bool pop_fpu_stack) { function in class:LIR_Assembler
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