Searched refs:slice_height (Results 1 - 17 of 17) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/display/dc/dsc/
H A Drc_calc.c48 int slice_height = pps->slice_height; local
60 slice_width, slice_height,
H A Drc_calc_dpi.c35 to->slice_height = from->slice_height;
H A Ddc_dsc.c859 int slice_height; local
1021 slice_height = min(policy.min_slice_height, pic_height);
1023 slice_height = min((int)(options->dsc_min_slice_height_override), pic_height);
1025 while (slice_height < pic_height && (pic_height % slice_height != 0 ||
1026 slice_height % options->slice_height_granularity != 0 ||
1027 (timing->pixel_encoding == PIXEL_ENCODING_YCBCR420 && slice_height % 2 != 0)))
1028 slice_height++;
1031 is_dsc_possible = (slice_height % 2 == 0);
1036 if (slice_height >
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dsc/
H A Drc_calc_fpu.h87 int slice_height,
H A Drc_calc_fpu.c171 int slice_height,
197 rc->first_line_bpg_offset = median3(0, (12 + (int) (0.09 * min(34, slice_height - 8))), (int)((3 * bpc * 3) - (3 * bpp_group)));
202 rc->first_line_bpg_offset = median3(0, (12 + (int) (0.09 * min(34, slice_height - 8))), (int)((3 * bpc * 4) - (3 * bpp_group)));
208 rc->first_line_bpg_offset = median3(0, (12 + (int) (0.09 * min(34, slice_height - 8))), (int)(((3 * bpc + (cm == CM_444 ? 0 : 2)) * 3) - (3 * bpp_group)));
165 _do_calc_rc_params(struct rc_params *rc, enum colour_mode cm, enum bits_per_comp bpc, u16 drm_bpp, bool is_navite_422_or_420, int slice_width, int slice_height, int minor_version) argument
/openbsd-current/sys/dev/pci/drm/i915/display/
H A Dintel_vdsc.c85 if (vdsc_cfg->slice_height >= 8)
87 12 + DIV_ROUND_UP((9 * min(34, vdsc_cfg->slice_height - 8)), 100);
89 vdsc_cfg->first_line_bpg_offset = 2 * (vdsc_cfg->slice_height - 1);
93 * -second_line_bpg_offset is 12 in general and equal to 2*(slice_height-1) if slice
97 * -nsl_bpg_offset is calculated as second_line_offset/slice_height -1 then rounded
102 if (vdsc_cfg->slice_height >= 8)
106 2 * (vdsc_cfg->slice_height - 1);
110 vdsc_cfg->slice_height - 1);
222 if (vdsc_cfg->slice_height > 4095)
224 if (vdsc_cfg->slice_height * vdsc_cf
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H A Dintel_vdsc_regs.h142 #define DSC_SLICE_HEIGHT(slice_height) ((slice_height) << 0)
H A Dintel_hdmi.c3104 * intel_hdmi_dsc_get_slice_height - get the dsc slice_height
3111 int slice_height; local
3120 for (slice_height = 96; slice_height <= vactive; slice_height += 2)
3121 if (vactive % slice_height == 0)
3122 return slice_height;
H A Dintel_dp.c1562 int slice_height; local
1570 for (slice_height = 108; slice_height <= vactive; slice_height += 2)
1571 if (vactive % slice_height == 0)
1572 return slice_height;
1576 * finding appropriate slice_height in above loop but returning
1577 * slice_height as 2 here as it should work with all resolutions.
1600 vdsc_cfg->slice_height = intel_dp_get_slice_height(vdsc_cfg->pic_height);
2871 int slice_height; local
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H A Dintel_vbt_defs.h1024 u16 slice_height; member in struct:dsc_compression_parameters_entry
H A Dicl_dsi.c1601 drm_WARN_ON(&dev_priv->drm, vdsc_cfg->slice_height < 8);
1603 vdsc_cfg->pic_height % vdsc_cfg->slice_height);
H A Dintel_psr.c996 vdsc_cfg->slice_height % y_granularity)
1955 y_alignment = vdsc_cfg->slice_height;
H A Dintel_bios.c3466 vdsc_cfg->slice_height = dsc->slice_height;
/openbsd-current/sys/dev/pci/drm/include/drm/display/
H A Ddrm_dsc.h100 * @slice_height: Slice height in pixels
102 u16 slice_height; member in struct:drm_dsc_config
350 * @slice_height:
353 __be16 slice_height; member in struct:drm_dsc_picture_parameter_set
/openbsd-current/sys/dev/pci/drm/display/
H A Ddrm_dsc_helper.c147 pps_payload->slice_height = cpu_to_be16(dsc_cfg->slice_height);
1354 slice_bits = 8 * vdsc_cfg->slice_chunk_size * vdsc_cfg->slice_height;
1381 if (vdsc_cfg->slice_height > 1)
1388 (vdsc_cfg->slice_height - 1));
1393 groups_total = groups_per_line * vdsc_cfg->slice_height;
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_dsc.c301 DC_LOG_DSC("\tslice_height %d", pps->slice_height);
416 dsc_reg_vals->pps.slice_height = dsc_cfg->pic_height / dsc_cfg->dc_dsc_cfg.num_slices_v;
418 ASSERT(dsc_reg_vals->pps.slice_height * dsc_cfg->dc_dsc_cfg.num_slices_v == dsc_cfg->pic_height);
419 if (!(dsc_reg_vals->pps.slice_height * dsc_cfg->dc_dsc_cfg.num_slices_v == dsc_cfg->pic_height)) {
543 reg_vals->pps.slice_height = 0;
652 SLICE_HEIGHT, reg_vals->pps.slice_height);
/openbsd-current/sys/dev/pci/drm/amd/display/modules/power/
H A Dpower_helpers.c946 uint16_t slice_height; local
962 slice_height = pic_height / stream->timing.dsc_cfg.num_slices_v;
963 config->dsc_slice_height = slice_height;
965 if (slice_height) {
967 (slice_height % config->su_y_granularity)) {

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