Searched refs:rq_regs (Results 1 - 25 of 37) sorted by relevance

12

/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn201/
H A Ddcn201_hubp.c67 struct _vcs_dpi_display_rq_regs_st *rq_regs)
72 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address);
75 DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode,
76 PRQ_EXPANSION_MODE, rq_regs->prq_expansion_mode,
77 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
78 CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode);
81 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size,
82 MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size,
83 META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size,
84 MIN_META_CHUNK_SIZE, rq_regs
66 hubp201_program_requestor(struct hubp *hubp, struct _vcs_dpi_display_rq_regs_st *rq_regs) argument
95 hubp201_setup( struct hubp *hubp, struct _vcs_dpi_display_dlg_regs_st *dlg_attr, struct _vcs_dpi_display_ttu_regs_st *ttu_attr, struct _vcs_dpi_display_rq_regs_st *rq_regs, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest) argument
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn21/
H A Ddcn21_hubp.c139 struct _vcs_dpi_display_rq_regs_st *rq_regs)
144 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address);
146 DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode,
147 PRQ_EXPANSION_MODE, rq_regs->prq_expansion_mode,
148 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
149 CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode);
151 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size,
152 MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size,
153 META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size,
154 MIN_META_CHUNK_SIZE, rq_regs
137 hubp21_program_requestor( struct hubp *hubp, struct _vcs_dpi_display_rq_regs_st *rq_regs) argument
169 hubp21_setup( struct hubp *hubp, struct _vcs_dpi_display_dlg_regs_st *dlg_attr, struct _vcs_dpi_display_ttu_regs_st *ttu_attr, struct _vcs_dpi_display_rq_regs_st *rq_regs, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest) argument
258 struct _vcs_dpi_display_rq_regs_st rq_regs = {0}; local
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/
H A Ddisplay_rq_dlg_helpers.h41 void print__data_rq_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_data_rq_regs_st *rq_regs);
42 void print__rq_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_rq_regs_st *rq_regs);
H A Ddisplay_rq_dlg_helpers.c156 void print__data_rq_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_data_rq_regs_st *rq_regs) argument
160 dml_print("DML_RQ_DLG_CALC: chunk_size = 0x%0x\n", rq_regs->chunk_size);
161 dml_print("DML_RQ_DLG_CALC: min_chunk_size = 0x%0x\n", rq_regs->min_chunk_size);
162 dml_print("DML_RQ_DLG_CALC: meta_chunk_size = 0x%0x\n", rq_regs->meta_chunk_size);
165 rq_regs->min_meta_chunk_size);
166 dml_print("DML_RQ_DLG_CALC: dpte_group_size = 0x%0x\n", rq_regs->dpte_group_size);
167 dml_print("DML_RQ_DLG_CALC: mpte_group_size = 0x%0x\n", rq_regs->mpte_group_size);
168 dml_print("DML_RQ_DLG_CALC: swath_height = 0x%0x\n", rq_regs->swath_height);
171 rq_regs->pte_row_height_linear);
175 void print__rq_regs_st(struct display_mode_lib *mode_lib, const struct _vcs_dpi_display_rq_regs_st *rq_regs) argument
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H A Ddml1_display_rq_dlg_calc.h35 struct _vcs_dpi_display_rq_regs_st *rq_regs,
H A Ddisplay_mode_lib.h65 display_rq_regs_st *rq_regs,
76 void (*rq_dlg_get_rq_reg_v2)(display_rq_regs_st *rq_regs,
H A Ddml1_display_rq_dlg_calc.c208 struct _vcs_dpi_display_data_rq_regs_st *rq_regs,
214 rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10;
217 rq_regs->min_chunk_size = 0;
219 rq_regs->min_chunk_size = dml_log2(rq_sizing->min_chunk_bytes) - 8 + 1;
221 rq_regs->meta_chunk_size = dml_log2(rq_sizing->meta_chunk_bytes) - 10;
223 rq_regs->min_meta_chunk_size = 0;
225 rq_regs->min_meta_chunk_size = dml_log2(rq_sizing->min_meta_chunk_bytes) - 6 + 1;
227 rq_regs->dpte_group_size = dml_log2(rq_sizing->dpte_group_bytes) - 6;
228 rq_regs->mpte_group_size = dml_log2(rq_sizing->mpte_group_bytes) - 6;
233 struct _vcs_dpi_display_rq_regs_st *rq_regs,
206 extract_rq_sizing_regs( struct display_mode_lib *mode_lib, struct _vcs_dpi_display_data_rq_regs_st *rq_regs, const struct _vcs_dpi_display_data_rq_sizing_params_st *rq_sizing) argument
231 dml1_extract_rq_regs( struct display_mode_lib *mode_lib, struct _vcs_dpi_display_rq_regs_st *rq_regs, const struct _vcs_dpi_display_rq_params_st *rq_param) argument
[all...]
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn20/
H A Ddcn20_hubp.c196 struct _vcs_dpi_display_rq_regs_st *rq_regs)
201 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address);
203 DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode,
204 PRQ_EXPANSION_MODE, rq_regs->prq_expansion_mode,
205 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
206 CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode);
208 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size,
209 MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size,
210 META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size,
211 MIN_META_CHUNK_SIZE, rq_regs
195 hubp2_program_requestor(struct hubp *hubp, struct _vcs_dpi_display_rq_regs_st *rq_regs) argument
227 hubp2_setup( struct hubp *hubp, struct _vcs_dpi_display_dlg_regs_st *dlg_attr, struct _vcs_dpi_display_ttu_regs_st *ttu_attr, struct _vcs_dpi_display_rq_regs_st *rq_regs, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest) argument
1118 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; local
1308 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; local
1341 struct _vcs_dpi_display_rq_regs_st rq_regs = {0}; local
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.h36 // and then populate the rq_regs struct
40 // rq_regs - struct that holds all the RQ registers field value.
43 display_rq_regs_st *rq_regs,
H A Ddisplay_rq_dlg_calc_30.c92 display_data_rq_regs_st *rq_regs,
98 rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10;
101 rq_regs->min_chunk_size = 0;
103 rq_regs->min_chunk_size = dml_log2(rq_sizing->min_chunk_bytes) - 8 + 1;
105 rq_regs->meta_chunk_size = dml_log2(rq_sizing->meta_chunk_bytes) - 10;
107 rq_regs->min_meta_chunk_size = 0;
109 rq_regs->min_meta_chunk_size = dml_log2(rq_sizing->min_meta_chunk_bytes) - 6 + 1;
111 rq_regs->dpte_group_size = dml_log2(rq_sizing->dpte_group_bytes) - 6;
112 rq_regs->mpte_group_size = dml_log2(rq_sizing->mpte_group_bytes) - 6;
116 display_rq_regs_st *rq_regs,
91 extract_rq_sizing_regs(struct display_mode_lib *mode_lib, display_data_rq_regs_st *rq_regs, const display_data_rq_sizing_params_st *rq_sizing) argument
115 extract_rq_regs(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_rq_params_st *rq_param) argument
789 dml30_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_pipe_params_st *pipe_param) argument
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn31/
H A Ddisplay_rq_dlg_calc_31.h36 // and then populate the rq_regs struct
40 // rq_regs - struct that holds all the RQ registers field value.
43 display_rq_regs_st *rq_regs,
H A Ddisplay_rq_dlg_calc_31.c91 static void extract_rq_sizing_regs(struct display_mode_lib *mode_lib, display_data_rq_regs_st *rq_regs, const display_data_rq_sizing_params_st *rq_sizing) argument
95 rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10;
98 rq_regs->min_chunk_size = 0;
100 rq_regs->min_chunk_size = dml_log2(rq_sizing->min_chunk_bytes) - 8 + 1;
102 rq_regs->meta_chunk_size = dml_log2(rq_sizing->meta_chunk_bytes) - 10;
104 rq_regs->min_meta_chunk_size = 0;
106 rq_regs->min_meta_chunk_size = dml_log2(rq_sizing->min_meta_chunk_bytes) - 6 + 1;
108 rq_regs->dpte_group_size = dml_log2(rq_sizing->dpte_group_bytes) - 6;
109 rq_regs->mpte_group_size = dml_log2(rq_sizing->mpte_group_bytes) - 6;
112 static void extract_rq_regs(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, cons argument
769 dml31_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_pipe_params_st *pipe_param) argument
[all...]
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.h38 // and then populate the rq_regs struct
42 // rq_regs - struct that holds all the RQ registers field value.
46 display_rq_regs_st *rq_regs,
H A Ddisplay_rq_dlg_calc_21.c143 display_data_rq_regs_st *rq_regs,
149 rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10;
152 rq_regs->min_chunk_size = 0;
154 rq_regs->min_chunk_size = dml_log2(rq_sizing->min_chunk_bytes) - 8 + 1;
156 rq_regs->meta_chunk_size = dml_log2(rq_sizing->meta_chunk_bytes) - 10;
158 rq_regs->min_meta_chunk_size = 0;
160 rq_regs->min_meta_chunk_size = dml_log2(rq_sizing->min_meta_chunk_bytes) - 6 + 1;
162 rq_regs->dpte_group_size = dml_log2(rq_sizing->dpte_group_bytes) - 6;
163 rq_regs->mpte_group_size = dml_log2(rq_sizing->mpte_group_bytes) - 6;
168 display_rq_regs_st *rq_regs,
141 extract_rq_sizing_regs( struct display_mode_lib *mode_lib, display_data_rq_regs_st *rq_regs, const display_data_rq_sizing_params_st *rq_sizing) argument
166 extract_rq_regs( struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_rq_params_st *rq_param) argument
813 dml21_rq_dlg_get_rq_reg( struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_pipe_params_st *pipe_param) argument
[all...]
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20v2.h37 // and then populate the rq_regs struct
41 // rq_regs - struct that holds all the RQ registers field value.
45 display_rq_regs_st *rq_regs,
H A Ddisplay_rq_dlg_calc_20.h37 // and then populate the rq_regs struct
41 // rq_regs - struct that holds all the RQ registers field value.
45 display_rq_regs_st *rq_regs,
H A Ddisplay_rq_dlg_calc_20v2.c166 display_data_rq_regs_st *rq_regs,
172 rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10;
175 rq_regs->min_chunk_size = 0;
177 rq_regs->min_chunk_size = dml_log2(rq_sizing->min_chunk_bytes) - 8 + 1;
179 rq_regs->meta_chunk_size = dml_log2(rq_sizing->meta_chunk_bytes) - 10;
181 rq_regs->min_meta_chunk_size = 0;
183 rq_regs->min_meta_chunk_size = dml_log2(rq_sizing->min_meta_chunk_bytes) - 6 + 1;
185 rq_regs->dpte_group_size = dml_log2(rq_sizing->dpte_group_bytes) - 6;
186 rq_regs->mpte_group_size = dml_log2(rq_sizing->mpte_group_bytes) - 6;
190 display_rq_regs_st *rq_regs,
165 extract_rq_sizing_regs(struct display_mode_lib *mode_lib, display_data_rq_regs_st *rq_regs, const display_data_rq_sizing_params_st *rq_sizing) argument
189 extract_rq_regs(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_rq_params_st *rq_param) argument
769 dml20v2_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_pipe_params_st *pipe_param) argument
[all...]
H A Ddisplay_rq_dlg_calc_20.c166 display_data_rq_regs_st *rq_regs,
172 rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10;
175 rq_regs->min_chunk_size = 0;
177 rq_regs->min_chunk_size = dml_log2(rq_sizing->min_chunk_bytes) - 8 + 1;
179 rq_regs->meta_chunk_size = dml_log2(rq_sizing->meta_chunk_bytes) - 10;
181 rq_regs->min_meta_chunk_size = 0;
183 rq_regs->min_meta_chunk_size = dml_log2(rq_sizing->min_meta_chunk_bytes) - 6 + 1;
185 rq_regs->dpte_group_size = dml_log2(rq_sizing->dpte_group_bytes) - 6;
186 rq_regs->mpte_group_size = dml_log2(rq_sizing->mpte_group_bytes) - 6;
190 display_rq_regs_st *rq_regs,
165 extract_rq_sizing_regs(struct display_mode_lib *mode_lib, display_data_rq_regs_st *rq_regs, const display_data_rq_sizing_params_st *rq_sizing) argument
189 extract_rq_regs(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_rq_params_st *rq_param) argument
769 dml20_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_pipe_params_st *pipe_param) argument
[all...]
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn314/
H A Ddisplay_rq_dlg_calc_314.h37 // and then populate the rq_regs struct
41 // rq_regs - struct that holds all the RQ registers field value.
44 display_rq_regs_st *rq_regs,
H A Ddisplay_rq_dlg_calc_314.c179 static void extract_rq_sizing_regs(struct display_mode_lib *mode_lib, display_data_rq_regs_st *rq_regs, const display_data_rq_sizing_params_st *rq_sizing) argument
183 rq_regs->chunk_size = dml_log2(rq_sizing->chunk_bytes) - 10;
186 rq_regs->min_chunk_size = 0;
188 rq_regs->min_chunk_size = dml_log2(rq_sizing->min_chunk_bytes) - 8 + 1;
190 rq_regs->meta_chunk_size = dml_log2(rq_sizing->meta_chunk_bytes) - 10;
192 rq_regs->min_meta_chunk_size = 0;
194 rq_regs->min_meta_chunk_size = dml_log2(rq_sizing->min_meta_chunk_bytes) - 6 + 1;
196 rq_regs->dpte_group_size = dml_log2(rq_sizing->dpte_group_bytes) - 6;
197 rq_regs->mpte_group_size = dml_log2(rq_sizing->mpte_group_bytes) - 6;
200 static void extract_rq_regs(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, cons argument
856 dml314_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, display_rq_regs_st *rq_regs, const display_pipe_params_st *pipe_param) argument
[all...]
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dml/dcn32/
H A Ddisplay_rq_dlg_calc_32.h37 * and then populate the rq_regs struct
41 * rq_regs - struct that holds all the RQ registers field value.
44 void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs,
H A Ddisplay_rq_dlg_calc_32.c43 void dml32_rq_dlg_get_rq_reg(display_rq_regs_st *rq_regs, argument
72 memset(rq_regs, 0, sizeof(*rq_regs));
98 rq_regs->rq_regs_l.chunk_size = dml_log2(pixel_chunk_bytes) - 10;
99 rq_regs->rq_regs_c.chunk_size = dml_log2(p1_pixel_chunk_bytes) - 10;
102 rq_regs->rq_regs_l.min_chunk_size = 0;
104 rq_regs->rq_regs_l.min_chunk_size = dml_log2(min_pixel_chunk_bytes) - 8 + 1;
107 rq_regs->rq_regs_c.min_chunk_size = 0;
109 rq_regs->rq_regs_c.min_chunk_size = dml_log2(p1_min_pixel_chunk_bytes) - 8 + 1;
111 rq_regs
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/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn30/
H A Ddcn30_hubp.c430 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; local
435 CHUNK_SIZE, &rq_regs->rq_regs_l.chunk_size,
436 MIN_CHUNK_SIZE, &rq_regs->rq_regs_l.min_chunk_size,
437 META_CHUNK_SIZE, &rq_regs->rq_regs_l.meta_chunk_size,
438 MIN_META_CHUNK_SIZE, &rq_regs->rq_regs_l.min_meta_chunk_size,
439 DPTE_GROUP_SIZE, &rq_regs->rq_regs_l.dpte_group_size,
440 SWATH_HEIGHT, &rq_regs->rq_regs_l.swath_height,
441 PTE_ROW_HEIGHT_LINEAR, &rq_regs->rq_regs_l.pte_row_height_linear);
444 CHUNK_SIZE_C, &rq_regs
460 hubp3_setup( struct hubp *hubp, struct _vcs_dpi_display_dlg_regs_st *dlg_attr, struct _vcs_dpi_display_ttu_regs_st *ttu_attr, struct _vcs_dpi_display_rq_regs_st *rq_regs, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest) argument
[all...]
/openbsd-current/sys/dev/pci/drm/amd/display/dc/dcn10/
H A Ddcn10_hubp.c554 struct _vcs_dpi_display_rq_regs_st *rq_regs)
559 DET_BUF_PLANE1_BASE_ADDRESS, rq_regs->plane1_base_address);
561 DRQ_EXPANSION_MODE, rq_regs->drq_expansion_mode,
562 PRQ_EXPANSION_MODE, rq_regs->prq_expansion_mode,
563 MRQ_EXPANSION_MODE, rq_regs->mrq_expansion_mode,
564 CRQ_EXPANSION_MODE, rq_regs->crq_expansion_mode);
566 CHUNK_SIZE, rq_regs->rq_regs_l.chunk_size,
567 MIN_CHUNK_SIZE, rq_regs->rq_regs_l.min_chunk_size,
568 META_CHUNK_SIZE, rq_regs->rq_regs_l.meta_chunk_size,
569 MIN_META_CHUNK_SIZE, rq_regs
552 hubp1_program_requestor( struct hubp *hubp, struct _vcs_dpi_display_rq_regs_st *rq_regs) argument
674 hubp1_setup( struct hubp *hubp, struct _vcs_dpi_display_dlg_regs_st *dlg_attr, struct _vcs_dpi_display_ttu_regs_st *ttu_attr, struct _vcs_dpi_display_rq_regs_st *rq_regs, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest) argument
873 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; local
1075 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; local
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H A Ddcn10_hw_sequencer_debug.c206 struct _vcs_dpi_display_rq_regs_st *rq_regs = &s->rq_regs; local
213 pool->hubps[i]->inst, rq_regs->drq_expansion_mode, rq_regs->prq_expansion_mode, rq_regs->mrq_expansion_mode,
214 rq_regs->crq_expansion_mode, rq_regs->plane1_base_address, rq_regs->rq_regs_l.chunk_size,
215 rq_regs->rq_regs_l.min_chunk_size, rq_regs
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