1251881Speter/* SPDX-License-Identifier: MIT */ 2251881Speter/* 3251881Speter * Copyright 2022 Advanced Micro Devices, Inc. 4251881Speter * 5251881Speter * Permission is hereby granted, free of charge, to any person obtaining a 6251881Speter * copy of this software and associated documentation files (the "Software"), 7251881Speter * to deal in the Software without restriction, including without limitation 8251881Speter * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9251881Speter * and/or sell copies of the Software, and to permit persons to whom the 10251881Speter * Software is furnished to do so, subject to the following conditions: 11251881Speter * 12251881Speter * The above copyright notice and this permission notice shall be included in 13251881Speter * all copies or substantial portions of the Software. 14251881Speter * 15251881Speter * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16251881Speter * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17251881Speter * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18251881Speter * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 19251881Speter * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 20251881Speter * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 21251881Speter * OTHER DEALINGS IN THE SOFTWARE. 22251881Speter * 23251881Speter * Authors: AMD 24251881Speter * 25251881Speter */ 26251881Speter 27251881Speter#ifndef __DML314_DISPLAY_RQ_DLG_CALC_H__ 28251881Speter#define __DML314_DISPLAY_RQ_DLG_CALC_H__ 29251881Speter 30251881Speter#include "../display_rq_dlg_helpers.h" 31251881Speter 32251881Speterstruct display_mode_lib; 33251881Speter 34251881Speter// Function: dml_rq_dlg_get_rq_reg 35251881Speter// Main entry point for test to get the register values out of this DML class. 36251881Speter// This function calls <get_rq_param> and <extract_rq_regs> fucntions to calculate 37251881Speter// and then populate the rq_regs struct 38251881Speter// Input: 39251881Speter// pipe_param - pipe source configuration (e.g. vp, pitch, scaling, dest, etc.) 40251881Speter// Output: 41251881Speter// rq_regs - struct that holds all the RQ registers field value. 42251881Speter// See also: <display_rq_regs_st> 43251881Spetervoid dml314_rq_dlg_get_rq_reg(struct display_mode_lib *mode_lib, 44251881Speter display_rq_regs_st *rq_regs, 45251881Speter const display_pipe_params_st *pipe_param); 46251881Speter 47251881Speter// Function: dml_rq_dlg_get_dlg_reg 48251881Speter// Calculate and return DLG and TTU register struct given the system setting 49251881Speter// Output: 50251881Speter// dlg_regs - output DLG register struct 51251881Speter// ttu_regs - output DLG TTU register struct 52251881Speter// Input: 53251881Speter// e2e_pipe_param - "compacted" array of e2e pipe param struct 54251881Speter// num_pipes - num of active "pipe" or "route" 55251881Speter// pipe_idx - index that identifies the e2e_pipe_param that corresponding to this dlg 56251881Speter// cstate - 0: when calculate min_ttu_vblank it is assumed cstate is not required. 1: Normal mode, cstate is considered. 57251881Speter// Added for legacy or unrealistic timing tests. 58251881Spetervoid dml314_rq_dlg_get_dlg_reg(struct display_mode_lib *mode_lib, 59251881Speter display_dlg_regs_st *dlg_regs, 60251881Speter display_ttu_regs_st *ttu_regs, 61251881Speter const display_e2e_pipe_params_st *e2e_pipe_param, 62251881Speter const unsigned int num_pipes, 63251881Speter const unsigned int pipe_idx, 64251881Speter const bool cstate_en, 65251881Speter const bool pstate_en, 66251881Speter const bool vm_en, 67251881Speter const bool ignore_viewport_pos, 68251881Speter const bool immediate_flip_support); 69251881Speter 70251881Speter#endif 71251881Speter