Searched refs:regPWRSEQ1_PWRSEQ_SPARE (Results 1 - 8 of 8) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dpcs/
H A Ddpcs_3_1_4_offset.h7212 #define regPWRSEQ1_PWRSEQ_SPARE 0x2f8d macro
H A Ddpcs_4_2_0_offset.h130 #define regPWRSEQ1_PWRSEQ_SPARE 0x2f8d macro
[all...]
H A Ddpcs_4_2_3_offset.h134 #define regPWRSEQ1_PWRSEQ_SPARE 0x2f8d macro
[all...]
H A Ddpcs_4_2_2_offset.h117 #define regPWRSEQ1_PWRSEQ_SPARE 0x2f8d macro
[all...]
/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_6_offset.h13061 #define regPWRSEQ1_PWRSEQ_SPARE macro
[all...]
H A Ddcn_3_1_4_offset.h11578 #define regPWRSEQ1_PWRSEQ_SPARE macro
[all...]
H A Ddcn_3_1_5_offset.h12330 #define regPWRSEQ1_PWRSEQ_SPARE macro
[all...]
H A Ddcn_3_1_2_offset.h12465 #define regPWRSEQ1_PWRSEQ_SPARE macro
[all...]

Completed in 1766 milliseconds