Searched refs:regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R_BASE_IDX (Results 1 - 6 of 6) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h5514 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R_BASE_IDX 3 macro
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H A Ddcn_3_2_1_offset.h5513 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R_BASE_IDX 3 macro
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H A Ddcn_3_1_6_offset.h7448 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R_BASE_IDX 3 macro
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H A Ddcn_3_1_4_offset.h13899 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R_BASE_IDX macro
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H A Ddcn_3_1_5_offset.h6987 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R_BASE_IDX 3 macro
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H A Ddcn_3_1_2_offset.h7228 #define regMPCC_OGAM3_MPCC_OGAM_RAMA_START_CNTL_R_BASE_IDX 3 macro
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