Searched refs:regDSC_TOP3_DSC_DEBUG_CONTROL (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h12121 #define regDSC_TOP3_DSC_DEBUG_CONTROL macro
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H A Ddcn_3_2_1_offset.h12130 #define regDSC_TOP3_DSC_DEBUG_CONTROL macro
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H A Ddcn_3_1_4_offset.h11982 #define regDSC_TOP3_DSC_DEBUG_CONTROL macro
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