Searched refs:regDSCC3_DSCC_PPS_CONFIG5 (Results 1 - 3 of 3) sorted by relevance

/openbsd-current/sys/dev/pci/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_2_0_offset.h12037 #define regDSCC3_DSCC_PPS_CONFIG5 macro
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H A Ddcn_3_2_1_offset.h12046 #define regDSCC3_DSCC_PPS_CONFIG5 macro
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H A Ddcn_3_1_4_offset.h12014 #define regDSCC3_DSCC_PPS_CONFIG5 macro
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